1991年之前老毛子计算机技术VS MD为首的西方列强

以事实为依据，数据作参考。



一下是发展的主要摘要：

= * = * = * = * 1960 * = * = * = * =[11] Control Data starts development of CDC 6600.

[12] Honeywell introduces Honeywell 800, with hardware support for timesharing between eight programs.

[13] E. V. Yevreinov at the Institute of Mathematics in Novosibirsk (IMN) begins work on tightly-coupled, coarse-grain parallel architectures with programmable interconnects.


= * = * = * = * 1966 * = * = * = * =
[24] Arthur Bernstein introduces Bernstein's Condition for statement independence (the foundation of subsequent work on data dependence analysis).

[25] CDC introduces CDC 6500, containing two CDC 6400 processors. Principal architect is Jim Thornton.

[26] The UNIVAC division of Sperry Rand Corporation delivers the first multiprocessor 1108. Each contains up to 3 CPUs and 2 I/O controllers; its EXEC 8 operating system provides interface for multithread program execution.

[27] Michael Flynn publishes a paper describing the architectural taxonomy which bears his name.

[28] The Minsk-222 completed by E. V. Yevreinov at the Institute of Mathematics, Novosibirsk


= * = * = * = * 1967 * = * = * = * =[29] Karp, Miller and Winograd publish paper describing the use of dependence vectors and loop transformations to analyze data dependencies.

[30] IBM produces the 360/91 (later model 95) with dynamic instruction reordering. 20 of these are produced over the next several years; the line is eventually supplanted by the slower Model 85.

[31] BESM-6, developed at Institute of Precision Mechanics and Computer Technology (ITMVT) in Moscow, goes into production. Machine has 48-bit words, achieves 1 MIPS, and contains virtual memory and a pipelined processor.

[32] Gene Amdahl and Daniel Slotnick have published debate at AFIPS Conference about the feasibility of parallel processing. Amdahl's argument about limits to parallelism becomes known as "Amdahl's Law"; he also propounds a corollary about system balance (sometimes called "Amdahl's Other Law"), which states that a balanced machine has the same number of MIPS, Mbytes, and Mbit/s of I/O bandwidth.


= * = * = * = * 1971 * = * = * = * =
[45] CDC delivers hardwired Cyberplus parallel radar image processing system to Rome Air Development Center, where it achieves 250 times the performance of a CDC 6600.

[46] Intel produces the world's first single-chip CPU, the 4004 microprocessor. 0.06 MIPS capacity


[47] Texas Instruments delivers the first Advanced Scientific Computer (also called Advanced Seismic Computer), containing 4 pipelines with an 80 ns clock time. Vector instructions were memory-to-memory. Seven of these machines are later built, and an aggressive automatic vectorizing FORTRAN compiler is developed for them. It is the first machine to contain SECDED (Single Error Correction, Double Error Detection) memory.

= * = * = * = * 1975 * = * = * = * =

[76] Design of the iAPX 432 symmetric multiprocessor begins at Intel.

= * = * = * = * 1976 * = * = * = * =
[77] The Parafrase compiler system is developed at University of Illinois under the direction of David Kuck. A successor to a program called the Analyzer, Parafrase is used as a testbed for the development of many new ideas on vectorization and program transformation.

[78] Carl Hewitt, at MIT, invents the Actors model, in which control structures are patterns of messages. This model is the basis for much later work on high-level parallel programming models.

[79] Floating Point Systems Inc. delivers its first 38-bit AP-120B array processor. The machine issues multiple pipelined instructions every cycle.

[80] Cray Research delivers the first Freon-cooled CRAY-1 to Los Alamos National Laboratory.

[81] Fujitsu delivers the first FACOM-230 vector processor to the Japanese National Aerospace Laboratory (NAL).

[82] Tandem ships its first NonStop fault-tolerant disjoint-memory machines with 2 to 16 custom processors, dual inter-processor buses, and a message-based operating system. The machines are used primarily for on-line transaction processing.

[83] Work on the PS-2000 multiprocessor begins at the Institute of Control Problems in Moscow (IPU) and the Scientific Research Institute of Control Computers in Severodonetsk, Ukraine (NIIUVM).

[84] Utpal Banerjee's thesis at the University of Illinois formalizes the concept of data dependence, and describes and implements the analysis algorithm named after him.

[85] CDC delivers the Flexible Processor, a programmable signal processing unit with a 48-bit instruction word.

[86] Borroughs delivers the PEPE associative processor.

[87] Floating Point Systems Inc. describes loop wrapping (later called software pipelining), which it uses to program pipelined multiple instruction issue processors.


= * = * = * = * 1980 * = * = * = * =
[114] PFC (Parallel FORTRAN Compiler) developed at Rice University under the direction of Ken Kennedy.

[115] Teradata spun off from Citibank to develop parallel database query processors.

[116] First PS-2000 multiprocessors go into operation in the USSR. Each contains 64 24-bit processing elements on a segmentable bus, with independent addressing in each PE. The machine's total performance is 200 MIPS. Approximately 200 are manufactured between 1981 and 1989.
[117] J. T. Schwartz publishes paper describing and analyzing the ultracomputer model, in which processors are connected by a shuffle/exchange network.

[118] Robin Milner, working at the University of Edinburgh, describes the Calculus of Communicating Systems, a theoretical framework for describing the properties of concurrent systems.

[119] David Padua and David Kuck at the University of Illinois develop the DOACROSS parallel construct to be used as a target in program transformation. The name DOACROSS is due to Robert Kuhn.

[120] DEC develops the KL10 symmetric multiprocessor. Up to three CPUs are supported, but one customer builds a five-CPU system.

[121] First El'brus-1, delivering 12 MIPS, passes testing in the USSR.

[122] Les Valiant describes and analyzes random routing, a method for reducing contention in message-routing networks. The technique is later incorporated into some machines, and is the basis for much work on PRAM emulation.

[123] Burroughs Scientific Processor project cancelled after one sale but before delivery.

= * = * = * = * 1986 * = * = * = * =
[206] Loral Instrumentation delivers the first LDF-100 dataflow computer to the U.S. government. Two more systems are shipped before the project is shut down.

[207] Gul Agha, at the University of Illinois, describes a new form of the Actors model which is the foundation for much later work on fine-grained multicomputer architectures and software.

[208] The CrOS III programming system, Cubix (a file-system handler) and Plotix (a graphics handler) are developed for the Caltech hypercubes. These are later the basis for several widely-used message-passing programming systems.

[209] Scientific Computer Systems delivers first SCS-40, a Cray-compatible minisupercomputer.

[210] First El'brus-2 completed in the USSR. The machine contains 10 processor, and delivers 125 MIPS (94 MFLOPS) peak performance. Approximately 200 machines are later manufactured.
[211] Thinking Machines ships first CM-1 Connection Machine, containing up to 65536 single-bit processors connected in hypercube.

[212] Encore ships its first bus-based Multimax computer, which couples NS32032 processors to Weitek floating-point accelerators.

[213] Dally shows that low-dimensional k-ary n-cubes are more wire-efficient than hypercubes for typical values of network bisection, message length, and module pinout. Dally demonstrates the torus routing chip, the first low-dimensional wormhole routing component.

[214] Kai Li describes system for emulating shared virtual memory on disjoint-memory hardware.

[215] The Universities of Bologna, Padua, Pisa, and Rome, along with CERN and INFN, complete a 4-node QCD machine delivering 250 MFLOPS peak and 60 Mflops sustained performance.

[216] CRAY X-MP with 4 processors achieves 713 MFLOPS (against a peak of 840) on 1000x1000 LINPACK.

[217] Alan Karp offers $100 prize to first person to demonstrate speedup of 200 or more on general purpose parallel processor. Benner, Gustafson, and Montry begin work to win it, and are later awarded the Gordon Bell Prize.

[218] Arvind, Nikhil, and Pingali at MIT propose the I-structure, a parallel array-like structure allowing side effects. This is incorporated into the Id language, and similar constructs soon appear in other high-level languages.

[219] Floating Point Systems introduces its T-series hypercube, which combines Weitek floating-point units with Inmos transputers. A 128-processor system is shipped to Los Alamos.

[220] Active Memory Technology spun off from ICL to develop DAP products.

[221] Kendall Square Research Corporation (KSR) is founded by Henry Burkhardt (a former Data General and Encore founder) and Steve Frank, to build multiprocessor computers.

[222] GE installs a prototype 10-processor programmable bit-slice systolic array called the Warp at CMU.

在苏联还在用BESM计算机时，那是冷战的早期阶段，计算机性能有可能是与西方并驾齐驱的。


在八十年开始，集成电路逐渐流行之后，苏联就开始落后了。之后就一去不复返了。

注：苏联计算机系统发展历程：

BESM-1
BESM-1, originally referred to as simply the BESM or BESM AN ("BESM Akademii Nauk", BESM of the Academy of Sciences), was completed in 1952. Only one BESM-1 machine was built. The machine used approximately 5,000 vacuum tubes. At the time of completion, it was the fastest computer in Europe. The floating point numbers were represented as 39-bit words: 32 bits for the numeric part, 1 bit for sign, and 1 + 5 bits for the exponent. It was capable of representing numbers in the range 10−9 – 1010. BESM-1 had 1024 words of read/write memory using ferrite cores, and 1024 words of read-only memory based on semiconducting diodes. It also had external storage: 4 magnetic tape units of 30,000 words each, and fast magnetic drum storage with a capacity of 5120 words and an access rate of 800 words/second. The computer was capable of performing 8–10 KFlops. The energy consumption was approximately 30 kW, not accounting for the cooling systems.

BESM-2 also used vacuum tubes.

BESM-3M and BESM-4 were built using transistors. Their architecture was similar to that of the M-20 and M-220 series. The word size was 45 bits. 30 BESM-4 machines were built.

EPSILON (a macro language with high level features including strings and lists, developed by Andrey Ershov at Novosibirsk in 1967) was used to implement ALGOL 68 on the M-220. [1]

[edit] BESM-6
The BESM-6 was arguably the most well-known and influential model of the series designed at the Institute of Precision Mechanics and Computer Engineering. The design was completed in 1966. Production started in 1968 and continued for the following 20 years[2].

可见在60年代时，苏联计算机是采用晶体管制造的。

80年代的Elbrus系列才开始采用集成电路。

Like its predecessors, the original BESM-6 was transistor-based (however, the version used in the 1980s as a component of the Elbrus supercomputer was built with integrated circuits). The machine's 48-bit processor ran at 10 MHz clock speed and featured two instruction pipelines, separate for the control and arithmetic units, and a data cache of 16 48-bit words. The system achieved performance of 1 MFlops. The fastest at the time supercomputer, CDC 6600 achieved 3 MFlops utilizing one central and ten peripheral processing units.

1968这个速度还是相当刚刚的。

The system memory was word-addressable using 15-bit addresses. The maximum addressable memory space was thus 32K words (192K bytes). A virtual memory system allowed to expand this up to 128K words (768K bytes).

（不知道当初80年代造出的现代级，搞出个512K,像堵墙，匪夷所思）

The BESM-6 was widely used in USSR in 1970s for various computation and control tasks. A version named 5E26 was used in the control system of the air defense missile complex S-300. During the 1975 Apollo-Soyuz Test Project the processing of Soyuz orbit parameters was accomplished by a BESM-6 based system in 1 minute. The same computation for the Apollo was carried out by the American side in 30 minutes.

关于阿波罗轨道计算的问题

A total of 355 of these machines were built. Production ended in 1987.

As the first Soviet computer with a large for the time installed base, the BESM-6 gathered a dedicated developer community. Over the years several operating systems and compilers for programming languages such as Fortran, Algol and Pascal were developed.[3].

Fortran, Algol and Pascal were developed 。这个比较牛！

A modification of the BESM-6 based on integrated circuits, with 2-3 times higher performance than the original machine, was produced in the 1980 under the name Elbrus-1K2 as a component of the Elbrus supercomputer

BESM-6的改型就是采用集成电路的Elbrus， 在1973年代开始集成电路CPU Elbrus的设计制造 。

主要型号如下：

Elbrus ( is a series of Soviet supercomputer systems developed by Lebedev Institute of Precision Mechanics and Computer Engineering (ITMiVT) since the 1970s. Since 1990s the development continued by MCST (Moscow Center of SPARC Technologies, ru:МЦСТ), a spin-off of the ITMiVT.

Elbrus 1 (1973) was the first Soviet integrated circuit computer,[citation needed] and the first fourth generation Soviet computer, developed by Vsevolod Burtsev. Used tag-based architecture and ALGOL as system language like the Burroughs large systems. It was used by the Defense Ministry. A side development was an update of the 1965 BESM-6 as Elbrus-1K2.

Elbrus 2 (1977) was a 10-processor computer, considered the first Soviet supercomputer, with superscalar RISC processors. Re-implementation of the Elbrus 1 architecture with the fast ECL chips. It was used in the space program, nuclear weapons research, and defense systems.

Elbrus 3 (1986) was a 16-processor computer developed by Boris Babaian. Differing completely from the architecture of both Elbrus 1 and Elbrus 2, it employed VLIW architecture.

Elbrus 2000 or E2K was a vaporware project to implement Elbrus 3 architecture as a microprocessor.

The current SPARC-like systems have been developed from 1996 with the Elbrus-90micro and the company was formed under an agreement with Sun Microsystems in 1997. The company reported in 1998 the development of an innovative EPIC processor dubbed E2K by a team under Boris Babaian.

Elbrus-3M. Single-processor computer. It was used to test the new, VLIW/EPIC (Very Long Instruction Word/Explicitly Parallel Instruction Computing) type processor. This processor is based on MCST/Elbrus E2K (or Elbrus 2000) architecture. The Elbrus processor (300 MHz, power consumption < 5 W) is fabricated with 0.13 micrometre technology. It has 75 millions of transistors and it executes up to 23 instructions per clock cycle. Performance: 23.7 GIPS/2.4 GFLOPS (64 bits), 4.8 GFLOPS (32 bits). This processor is manufactured in Taiwan.

Elbrus-3M1 is the latest computer of MCST/Elbrus. It has two Elbrus processors. It can work in parallel (using high velocity connections) with others Elbrus computers. So, the Elbrus-3M1 could be used to build super computers. According to the results of tests, the peak performance of the "Elbrus-3M1" computer is in the range of 11.6 GFLOPS to 45.2 GFLOPS, depending on the format of data.

Elbrus-3S will be the next computer of MCST/Elbrus, projected 2009. It will have four VLIW/EPIC type Elbrus-S processors (500 MHz, 0.09 micrometre technology, system on a chip).

Microprocessor Elbrus-PF, projected 2011. 65 nm technology, 8 cores VLIW/EPIC processor. With the transition to 45 nm technology, this processor will have a clock frequency of 2 GHz, and a performance of 8 TFLOPS. This processor will be used to build supercomputer with PFLOPS performance.

后面的设计规划和俄罗斯的半导体技术规划非常合拍---引进65nm,45nm技术。

以事实为依据，数据作参考。



一下是发展的主要摘要：

= * = * = * = * 1960 * = * = * = * =[11] Control Data starts development of CDC 6600.

[12] Honeywell introduces Honeywell 800, with hardware support for timesharing between eight programs.

[13] E. V. Yevreinov at the Institute of Mathematics in Novosibirsk (IMN) begins work on tightly-coupled, coarse-grain parallel architectures with programmable interconnects.


= * = * = * = * 1966 * = * = * = * =
[24] Arthur Bernstein introduces Bernstein's Condition for statement independence (the foundation of subsequent work on data dependence analysis).

[25] CDC introduces CDC 6500, containing two CDC 6400 processors. Principal architect is Jim Thornton.

[26] The UNIVAC division of Sperry Rand Corporation delivers the first multiprocessor 1108. Each contains up to 3 CPUs and 2 I/O controllers; its EXEC 8 operating system provides interface for multithread program execution.

[27] Michael Flynn publishes a paper describing the architectural taxonomy which bears his name.

[28] The Minsk-222 completed by E. V. Yevreinov at the Institute of Mathematics, Novosibirsk


= * = * = * = * 1967 * = * = * = * =[29] Karp, Miller and Winograd publish paper describing the use of dependence vectors and loop transformations to analyze data dependencies.

[30] IBM produces the 360/91 (later model 95) with dynamic instruction reordering. 20 of these are produced over the next several years; the line is eventually supplanted by the slower Model 85.

[31] BESM-6, developed at Institute of Precision Mechanics and Computer Technology (ITMVT) in Moscow, goes into production. Machine has 48-bit words, achieves 1 MIPS, and contains virtual memory and a pipelined processor.

[32] Gene Amdahl and Daniel Slotnick have published debate at AFIPS Conference about the feasibility of parallel processing. Amdahl's argument about limits to parallelism becomes known as "Amdahl's Law"; he also propounds a corollary about system balance (sometimes called "Amdahl's Other Law"), which states that a balanced machine has the same number of MIPS, Mbytes, and Mbit/s of I/O bandwidth.


= * = * = * = * 1971 * = * = * = * =
[45] CDC delivers hardwired Cyberplus parallel radar image processing system to Rome Air Development Center, where it achieves 250 times the performance of a CDC 6600.

[46] Intel produces the world's first single-chip CPU, the 4004 microprocessor. 0.06 MIPS capacity


[47] Texas Instruments delivers the first Advanced Scientific Computer (also called Advanced Seismic Computer), containing 4 pipelines with an 80 ns clock time. Vector instructions were memory-to-memory. Seven of these machines are later built, and an aggressive automatic vectorizing FORTRAN compiler is developed for them. It is the first machine to contain SECDED (Single Error Correction, Double Error Detection) memory.

= * = * = * = * 1975 * = * = * = * =

[76] Design of the iAPX 432 symmetric multiprocessor begins at Intel.

= * = * = * = * 1976 * = * = * = * =
[77] The Parafrase compiler system is developed at University of Illinois under the direction of David Kuck. A successor to a program called the Analyzer, Parafrase is used as a testbed for the development of many new ideas on vectorization and program transformation.

[78] Carl Hewitt, at MIT, invents the Actors model, in which control structures are patterns of messages. This model is the basis for much later work on high-level parallel programming models.

[79] Floating Point Systems Inc. delivers its first 38-bit AP-120B array processor. The machine issues multiple pipelined instructions every cycle.

[80] Cray Research delivers the first Freon-cooled CRAY-1 to Los Alamos National Laboratory.

[81] Fujitsu delivers the first FACOM-230 vector processor to the Japanese National Aerospace Laboratory (NAL).

[82] Tandem ships its first NonStop fault-tolerant disjoint-memory machines with 2 to 16 custom processors, dual inter-processor buses, and a message-based operating system. The machines are used primarily for on-line transaction processing.

[83] Work on the PS-2000 multiprocessor begins at the Institute of Control Problems in Moscow (IPU) and the Scientific Research Institute of Control Computers in Severodonetsk, Ukraine (NIIUVM).

[84] Utpal Banerjee's thesis at the University of Illinois formalizes the concept of data dependence, and describes and implements the analysis algorithm named after him.

[85] CDC delivers the Flexible Processor, a programmable signal processing unit with a 48-bit instruction word.

[86] Borroughs delivers the PEPE associative processor.

[87] Floating Point Systems Inc. describes loop wrapping (later called software pipelining), which it uses to program pipelined multiple instruction issue processors.


= * = * = * = * 1980 * = * = * = * =
[114] PFC (Parallel FORTRAN Compiler) developed at Rice University under the direction of Ken Kennedy.

[115] Teradata spun off from Citibank to develop parallel database query processors.

[116] First PS-2000 multiprocessors go into operation in the USSR. Each contains 64 24-bit processing elements on a segmentable bus, with independent addressing in each PE. The machine's total performance is 200 MIPS. Approximately 200 are manufactured between 1981 and 1989.
[117] J. T. Schwartz publishes paper describing and analyzing the ultracomputer model, in which processors are connected by a shuffle/exchange network.

[118] Robin Milner, working at the University of Edinburgh, describes the Calculus of Communicating Systems, a theoretical framework for describing the properties of concurrent systems.

[119] David Padua and David Kuck at the University of Illinois develop the DOACROSS parallel construct to be used as a target in program transformation. The name DOACROSS is due to Robert Kuhn.

[120] DEC develops the KL10 symmetric multiprocessor. Up to three CPUs are supported, but one customer builds a five-CPU system.

[121] First El'brus-1, delivering 12 MIPS, passes testing in the USSR.

[122] Les Valiant describes and analyzes random routing, a method for reducing contention in message-routing networks. The technique is later incorporated into some machines, and is the basis for much work on PRAM emulation.

[123] Burroughs Scientific Processor project cancelled after one sale but before delivery.

= * = * = * = * 1986 * = * = * = * =
[206] Loral Instrumentation delivers the first LDF-100 dataflow computer to the U.S. government. Two more systems are shipped before the project is shut down.

[207] Gul Agha, at the University of Illinois, describes a new form of the Actors model which is the foundation for much later work on fine-grained multicomputer architectures and software.

[208] The CrOS III programming system, Cubix (a file-system handler) and Plotix (a graphics handler) are developed for the Caltech hypercubes. These are later the basis for several widely-used message-passing programming systems.

[209] Scientific Computer Systems delivers first SCS-40, a Cray-compatible minisupercomputer.

[210] First El'brus-2 completed in the USSR. The machine contains 10 processor, and delivers 125 MIPS (94 MFLOPS) peak performance. Approximately 200 machines are later manufactured.
[211] Thinking Machines ships first CM-1 Connection Machine, containing up to 65536 single-bit processors connected in hypercube.

[212] Encore ships its first bus-based Multimax computer, which couples NS32032 processors to Weitek floating-point accelerators.

[213] Dally shows that low-dimensional k-ary n-cubes are more wire-efficient than hypercubes for typical values of network bisection, message length, and module pinout. Dally demonstrates the torus routing chip, the first low-dimensional wormhole routing component.

[214] Kai Li describes system for emulating shared virtual memory on disjoint-memory hardware.

[215] The Universities of Bologna, Padua, Pisa, and Rome, along with CERN and INFN, complete a 4-node QCD machine delivering 250 MFLOPS peak and 60 Mflops sustained performance.

[216] CRAY X-MP with 4 processors achieves 713 MFLOPS (against a peak of 840) on 1000x1000 LINPACK.

[217] Alan Karp offers $100 prize to first person to demonstrate speedup of 200 or more on general purpose parallel processor. Benner, Gustafson, and Montry begin work to win it, and are later awarded the Gordon Bell Prize.

[218] Arvind, Nikhil, and Pingali at MIT propose the I-structure, a parallel array-like structure allowing side effects. This is incorporated into the Id language, and similar constructs soon appear in other high-level languages.

[219] Floating Point Systems introduces its T-series hypercube, which combines Weitek floating-point units with Inmos transputers. A 128-processor system is shipped to Los Alamos.

[220] Active Memory Technology spun off from ICL to develop DAP products.

[221] Kendall Square Research Corporation (KSR) is founded by Henry Burkhardt (a former Data General and Encore founder) and Steve Frank, to build multiprocessor computers.

[222] GE installs a prototype 10-processor programmable bit-slice systolic array called the Warp at CMU.

在苏联还在用BESM计算机时，那是冷战的早期阶段，计算机性能有可能是与西方并驾齐驱的。


在八十年开始，集成电路逐渐流行之后，苏联就开始落后了。之后就一去不复返了。

注：苏联计算机系统发展历程：

BESM-1
BESM-1, originally referred to as simply the BESM or BESM AN ("BESM Akademii Nauk", BESM of the Academy of Sciences), was completed in 1952. Only one BESM-1 machine was built. The machine used approximately 5,000 vacuum tubes. At the time of completion, it was the fastest computer in Europe. The floating point numbers were represented as 39-bit words: 32 bits for the numeric part, 1 bit for sign, and 1 + 5 bits for the exponent. It was capable of representing numbers in the range 10−9 – 1010. BESM-1 had 1024 words of read/write memory using ferrite cores, and 1024 words of read-only memory based on semiconducting diodes. It also had external storage: 4 magnetic tape units of 30,000 words each, and fast magnetic drum storage with a capacity of 5120 words and an access rate of 800 words/second. The computer was capable of performing 8–10 KFlops. The energy consumption was approximately 30 kW, not accounting for the cooling systems.

BESM-2 also used vacuum tubes.

BESM-3M and BESM-4 were built using transistors. Their architecture was similar to that of the M-20 and M-220 series. The word size was 45 bits. 30 BESM-4 machines were built.

EPSILON (a macro language with high level features including strings and lists, developed by Andrey Ershov at Novosibirsk in 1967) was used to implement ALGOL 68 on the M-220. [1]

[edit] BESM-6
The BESM-6 was arguably the most well-known and influential model of the series designed at the Institute of Precision Mechanics and Computer Engineering. The design was completed in 1966. Production started in 1968 and continued for the following 20 years[2].

可见在60年代时，苏联计算机是采用晶体管制造的。

80年代的Elbrus系列才开始采用集成电路。

Like its predecessors, the original BESM-6 was transistor-based (however, the version used in the 1980s as a component of the Elbrus supercomputer was built with integrated circuits). The machine's 48-bit processor ran at 10 MHz clock speed and featured two instruction pipelines, separate for the control and arithmetic units, and a data cache of 16 48-bit words. The system achieved performance of 1 MFlops. The fastest at the time supercomputer, CDC 6600 achieved 3 MFlops utilizing one central and ten peripheral processing units.

1968这个速度还是相当刚刚的。

The system memory was word-addressable using 15-bit addresses. The maximum addressable memory space was thus 32K words (192K bytes). A virtual memory system allowed to expand this up to 128K words (768K bytes).

（不知道当初80年代造出的现代级，搞出个512K,像堵墙，匪夷所思）

The BESM-6 was widely used in USSR in 1970s for various computation and control tasks. A version named 5E26 was used in the control system of the air defense missile complex S-300. During the 1975 Apollo-Soyuz Test Project the processing of Soyuz orbit parameters was accomplished by a BESM-6 based system in 1 minute. The same computation for the Apollo was carried out by the American side in 30 minutes.

关于阿波罗轨道计算的问题

A total of 355 of these machines were built. Production ended in 1987.

As the first Soviet computer with a large for the time installed base, the BESM-6 gathered a dedicated developer community. Over the years several operating systems and compilers for programming languages such as Fortran, Algol and Pascal were developed.[3].

Fortran, Algol and Pascal were developed 。这个比较牛！

A modification of the BESM-6 based on integrated circuits, with 2-3 times higher performance than the original machine, was produced in the 1980 under the name Elbrus-1K2 as a component of the Elbrus supercomputer

BESM-6的改型就是采用集成电路的Elbrus， 在1973年代开始集成电路CPU Elbrus的设计制造 。

主要型号如下：

Elbrus ( is a series of Soviet supercomputer systems developed by Lebedev Institute of Precision Mechanics and Computer Engineering (ITMiVT) since the 1970s. Since 1990s the development continued by MCST (Moscow Center of SPARC Technologies, ru:МЦСТ), a spin-off of the ITMiVT.

Elbrus 1 (1973) was the first Soviet integrated circuit computer,[citation needed] and the first fourth generation Soviet computer, developed by Vsevolod Burtsev. Used tag-based architecture and ALGOL as system language like the Burroughs large systems. It was used by the Defense Ministry. A side development was an update of the 1965 BESM-6 as Elbrus-1K2.

Elbrus 2 (1977) was a 10-processor computer, considered the first Soviet supercomputer, with superscalar RISC processors. Re-implementation of the Elbrus 1 architecture with the fast ECL chips. It was used in the space program, nuclear weapons research, and defense systems.

Elbrus 3 (1986) was a 16-processor computer developed by Boris Babaian. Differing completely from the architecture of both Elbrus 1 and Elbrus 2, it employed VLIW architecture.

Elbrus 2000 or E2K was a vaporware project to implement Elbrus 3 architecture as a microprocessor.

The current SPARC-like systems have been developed from 1996 with the Elbrus-90micro and the company was formed under an agreement with Sun Microsystems in 1997. The company reported in 1998 the development of an innovative EPIC processor dubbed E2K by a team under Boris Babaian.

Elbrus-3M. Single-processor computer. It was used to test the new, VLIW/EPIC (Very Long Instruction Word/Explicitly Parallel Instruction Computing) type processor. This processor is based on MCST/Elbrus E2K (or Elbrus 2000) architecture. The Elbrus processor (300 MHz, power consumption < 5 W) is fabricated with 0.13 micrometre technology. It has 75 millions of transistors and it executes up to 23 instructions per clock cycle. Performance: 23.7 GIPS/2.4 GFLOPS (64 bits), 4.8 GFLOPS (32 bits). This processor is manufactured in Taiwan.

Elbrus-3M1 is the latest computer of MCST/Elbrus. It has two Elbrus processors. It can work in parallel (using high velocity connections) with others Elbrus computers. So, the Elbrus-3M1 could be used to build super computers. According to the results of tests, the peak performance of the "Elbrus-3M1" computer is in the range of 11.6 GFLOPS to 45.2 GFLOPS, depending on the format of data.

Elbrus-3S will be the next computer of MCST/Elbrus, projected 2009. It will have four VLIW/EPIC type Elbrus-S processors (500 MHz, 0.09 micrometre technology, system on a chip).

Microprocessor Elbrus-PF, projected 2011. 65 nm technology, 8 cores VLIW/EPIC processor. With the transition to 45 nm technology, this processor will have a clock frequency of 2 GHz, and a performance of 8 TFLOPS. This processor will be used to build supercomputer with PFLOPS performance.

后面的设计规划和俄罗斯的半导体技术规划非常合拍---引进65nm,45nm技术。