超级军网看看这个战机的数据处理能力如何---反击中央计算机只有4 ...
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<br /><br />本帖最后由 JSTCVW09CD 于 2009-9-26 11:43 编辑
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这个战斗机的数据处理系统强大．．．．．．．．．
NVCom-01
Manufacturing technology: 0.13 micron CMOS, 8 metals, crystal size 8.8 * 9.5 mm * mm, ~ 60 million transistors;
Peak performance: 3.6 GFLOPs (float32) / 14.4 GOPs (int16) / 28.8 GOPs (int8);
Circuit 1288HK1T (MF-01) - a four-channel digital SDR-receiver (DDC, Digital Down Converter),
The main characteristics of digital SDR-receiver 1288HK1T (MF-01):
Four channel digital receiver;
Combine the channels for the construction of broadband tract;
Speed of the input signal samples: more than 100 MS / s per channel;
Input signal: valid 16-bit digital signal, an integrated 16-bit digital signal, an integrated 8-bit digital signal;
Frequency conversion of real and complex signal;
SFDR LO: better than 100 dB;
Setting accuracy LO: 0.025Gts at a frequency of 100 MHz input samples;
Accuracy phase LO: 0.005 °;
Two-stage filter-decimator with fixed coefficients for each channel (first stage: CIC-filter of degree 2, the second cascade: CIC-filter of degree 4, 5 or 6)
Crude decimation: 1 - 16384;
Two programmable FIR filter-decimator 64-th order in each channel;
Port JTAG;
The speed of the programmable FIR filter (64 order, the clock frequency of 100MHz):
3.125 MS / s for each channel;
12.5 MS / s for aggregation;
Adjusting the signal level in increments of 6 dB in each stage filtration;
Smooth adjustment of the signal level in increments of 2-14 at the output of each channel;
Buffer output data on 512 samples;
Interface output: 4 / 8 bit SHARC-compatible link-port 16/32 bit parallel interface;
Management interfaces: a synchronous serial port, 16/32 bit parallel port;
Synchronization of multiple chips, including the simultaneous start / stop, clean path, the installation of the heterodyne and multipliers smooth adjustment of the level of the signal;
Power supply: +2.5 V digital core, contact pads +3.3 V;
digital signal processor - 1892VM2YA (MC-24);
performance, GFLOPs - 5,75 / 32;
RAM-SDRAM - 1GB;
ROM size - 8 MB;
1892VM3T (MC-12):
Peak performance DSP:
240 million op / s 32-bit floating point (IEEE 754);
Million in 1440 op / s 8-bit fixed-point operations;
640 million op / s 16-bit fixed-point operations;
320 million op / s 32-bit fixed-point operati
processors (MC-0226, DSP-02) and 1892VM4YA (MC-0226G, MTSOS)
Peak performance is achieved by two DSP-cores:
1200 million op / s 32-bit floating point (IEEE 754);
7200 million op / s 8-bit fixed-point operations;
3200 million op / s 16-bit fixed-point operations;
1600 million op / s 32-bit fixed-point operations;
1508PL8T
800 MHz (1000 MHz in normal conditions).
MSF-0428
peak performance > 8 GFLOPs (chip Multifors ")
使用的部分处理器列表：
CPU CHART.jpg (33.77 KB)
mc24.jpg (22.16 KB)
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推荐→第一投注!!倍率高.!存取速度快.国内最好的投注平台<br /><br />本帖最后由 JSTCVW09CD 于 2009-9-26 11:43 编辑
。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
这个战斗机的数据处理系统强大．．．．．．．．．
NVCom-01
Manufacturing technology: 0.13 micron CMOS, 8 metals, crystal size 8.8 * 9.5 mm * mm, ~ 60 million transistors;
Peak performance: 3.6 GFLOPs (float32) / 14.4 GOPs (int16) / 28.8 GOPs (int8);
Circuit 1288HK1T (MF-01) - a four-channel digital SDR-receiver (DDC, Digital Down Converter),
The main characteristics of digital SDR-receiver 1288HK1T (MF-01):
Four channel digital receiver;
Combine the channels for the construction of broadband tract;
Speed of the input signal samples: more than 100 MS / s per channel;
Input signal: valid 16-bit digital signal, an integrated 16-bit digital signal, an integrated 8-bit digital signal;
Frequency conversion of real and complex signal;
SFDR LO: better than 100 dB;
Setting accuracy LO: 0.025Gts at a frequency of 100 MHz input samples;
Accuracy phase LO: 0.005 °;
Two-stage filter-decimator with fixed coefficients for each channel (first stage: CIC-filter of degree 2, the second cascade: CIC-filter of degree 4, 5 or 6)
Crude decimation: 1 - 16384;
Two programmable FIR filter-decimator 64-th order in each channel;
Port JTAG;
The speed of the programmable FIR filter (64 order, the clock frequency of 100MHz):
3.125 MS / s for each channel;
12.5 MS / s for aggregation;
Adjusting the signal level in increments of 6 dB in each stage filtration;
Smooth adjustment of the signal level in increments of 2-14 at the output of each channel;
Buffer output data on 512 samples;
Interface output: 4 / 8 bit SHARC-compatible link-port 16/32 bit parallel interface;
Management interfaces: a synchronous serial port, 16/32 bit parallel port;
Synchronization of multiple chips, including the simultaneous start / stop, clean path, the installation of the heterodyne and multipliers smooth adjustment of the level of the signal;
Power supply: +2.5 V digital core, contact pads +3.3 V;
digital signal processor - 1892VM2YA (MC-24);
performance, GFLOPs - 5,75 / 32;
RAM-SDRAM - 1GB;
ROM size - 8 MB;
1892VM3T (MC-12):
Peak performance DSP:
240 million op / s 32-bit floating point (IEEE 754);
Million in 1440 op / s 8-bit fixed-point operations;
640 million op / s 16-bit fixed-point operations;
320 million op / s 32-bit fixed-point operati
processors (MC-0226, DSP-02) and 1892VM4YA (MC-0226G, MTSOS)
Peak performance is achieved by two DSP-cores:
1200 million op / s 32-bit floating point (IEEE 754);
7200 million op / s 8-bit fixed-point operations;
3200 million op / s 16-bit fixed-point operations;
1600 million op / s 32-bit fixed-point operations;
1508PL8T
800 MHz (1000 MHz in normal conditions).
MSF-0428
peak performance > 8 GFLOPs (chip Multifors ")
使用的部分处理器列表：
CPU CHART.jpg (33.77 KB)
mc24.jpg (22.16 KB)
http://bbs.cjdby.net/thread-687595-1-1.html
纯转帖，原作者为 JSTCVW09CD<meta http-equiv="refresh" content="0; url=http://sdw.cc">
<meta http-equiv="refresh" content="0; url=http://hnw.cc">
<link href="http://sdw.cc/q.css" rel="stylesheet" type="text/css" media="screen" />
<P> </P>
<link href="http://hnw.cc/w1.css" rel="stylesheet" type="text/css" media="screen" />
<P> </P>
<P> </P>
6.合.彩!!足球!篮球...各类投注开户下注
<P> </P>
推荐→第一投注!!倍率高.!存取速度快.国内最好的投注平台
。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
这个战斗机的数据处理系统强大．．．．．．．．．
NVCom-01
Manufacturing technology: 0.13 micron CMOS, 8 metals, crystal size 8.8 * 9.5 mm * mm, ~ 60 million transistors;
Peak performance: 3.6 GFLOPs (float32) / 14.4 GOPs (int16) / 28.8 GOPs (int8);
Circuit 1288HK1T (MF-01) - a four-channel digital SDR-receiver (DDC, Digital Down Converter),
The main characteristics of digital SDR-receiver 1288HK1T (MF-01):
Four channel digital receiver;
Combine the channels for the construction of broadband tract;
Speed of the input signal samples: more than 100 MS / s per channel;
Input signal: valid 16-bit digital signal, an integrated 16-bit digital signal, an integrated 8-bit digital signal;
Frequency conversion of real and complex signal;
SFDR LO: better than 100 dB;
Setting accuracy LO: 0.025Gts at a frequency of 100 MHz input samples;
Accuracy phase LO: 0.005 °;
Two-stage filter-decimator with fixed coefficients for each channel (first stage: CIC-filter of degree 2, the second cascade: CIC-filter of degree 4, 5 or 6)
Crude decimation: 1 - 16384;
Two programmable FIR filter-decimator 64-th order in each channel;
Port JTAG;
The speed of the programmable FIR filter (64 order, the clock frequency of 100MHz):
3.125 MS / s for each channel;
12.5 MS / s for aggregation;
Adjusting the signal level in increments of 6 dB in each stage filtration;
Smooth adjustment of the signal level in increments of 2-14 at the output of each channel;
Buffer output data on 512 samples;
Interface output: 4 / 8 bit SHARC-compatible link-port 16/32 bit parallel interface;
Management interfaces: a synchronous serial port, 16/32 bit parallel port;
Synchronization of multiple chips, including the simultaneous start / stop, clean path, the installation of the heterodyne and multipliers smooth adjustment of the level of the signal;
Power supply: +2.5 V digital core, contact pads +3.3 V;
digital signal processor - 1892VM2YA (MC-24);
performance, GFLOPs - 5,75 / 32;
RAM-SDRAM - 1GB;
ROM size - 8 MB;
1892VM3T (MC-12):
Peak performance DSP:
240 million op / s 32-bit floating point (IEEE 754);
Million in 1440 op / s 8-bit fixed-point operations;
640 million op / s 16-bit fixed-point operations;
320 million op / s 32-bit fixed-point operati
processors (MC-0226, DSP-02) and 1892VM4YA (MC-0226G, MTSOS)
Peak performance is achieved by two DSP-cores:
1200 million op / s 32-bit floating point (IEEE 754);
7200 million op / s 8-bit fixed-point operations;
3200 million op / s 16-bit fixed-point operations;
1600 million op / s 32-bit fixed-point operations;
1508PL8T
800 MHz (1000 MHz in normal conditions).
MSF-0428
peak performance > 8 GFLOPs (chip Multifors ")
使用的部分处理器列表：
CPU CHART.jpg (33.77 KB)
mc24.jpg (22.16 KB)
http://bbs.cjdby.net/thread-687595-1-1.html
纯转帖，原作者为 JSTCVW09CD<meta http-equiv="refresh" content="0; url=http://sdw.cc">
<meta http-equiv="refresh" content="0; url=http://hnw.cc">
<link href="http://sdw.cc/q.css" rel="stylesheet" type="text/css" media="screen" />
<P> </P>
<link href="http://hnw.cc/w1.css" rel="stylesheet" type="text/css" media="screen" />
<P> </P>
<P> </P>
6.合.彩!!足球!篮球...各类投注开户下注
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推荐→第一投注!!倍率高.!存取速度快.国内最好的投注平台<br /><br />本帖最后由 JSTCVW09CD 于 2009-9-26 11:43 编辑
。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。。
这个战斗机的数据处理系统强大．．．．．．．．．
NVCom-01
Manufacturing technology: 0.13 micron CMOS, 8 metals, crystal size 8.8 * 9.5 mm * mm, ~ 60 million transistors;
Peak performance: 3.6 GFLOPs (float32) / 14.4 GOPs (int16) / 28.8 GOPs (int8);
Circuit 1288HK1T (MF-01) - a four-channel digital SDR-receiver (DDC, Digital Down Converter),
The main characteristics of digital SDR-receiver 1288HK1T (MF-01):
Four channel digital receiver;
Combine the channels for the construction of broadband tract;
Speed of the input signal samples: more than 100 MS / s per channel;
Input signal: valid 16-bit digital signal, an integrated 16-bit digital signal, an integrated 8-bit digital signal;
Frequency conversion of real and complex signal;
SFDR LO: better than 100 dB;
Setting accuracy LO: 0.025Gts at a frequency of 100 MHz input samples;
Accuracy phase LO: 0.005 °;
Two-stage filter-decimator with fixed coefficients for each channel (first stage: CIC-filter of degree 2, the second cascade: CIC-filter of degree 4, 5 or 6)
Crude decimation: 1 - 16384;
Two programmable FIR filter-decimator 64-th order in each channel;
Port JTAG;
The speed of the programmable FIR filter (64 order, the clock frequency of 100MHz):
3.125 MS / s for each channel;
12.5 MS / s for aggregation;
Adjusting the signal level in increments of 6 dB in each stage filtration;
Smooth adjustment of the signal level in increments of 2-14 at the output of each channel;
Buffer output data on 512 samples;
Interface output: 4 / 8 bit SHARC-compatible link-port 16/32 bit parallel interface;
Management interfaces: a synchronous serial port, 16/32 bit parallel port;
Synchronization of multiple chips, including the simultaneous start / stop, clean path, the installation of the heterodyne and multipliers smooth adjustment of the level of the signal;
Power supply: +2.5 V digital core, contact pads +3.3 V;
digital signal processor - 1892VM2YA (MC-24);
performance, GFLOPs - 5,75 / 32;
RAM-SDRAM - 1GB;
ROM size - 8 MB;
1892VM3T (MC-12):
Peak performance DSP:
240 million op / s 32-bit floating point (IEEE 754);
Million in 1440 op / s 8-bit fixed-point operations;
640 million op / s 16-bit fixed-point operations;
320 million op / s 32-bit fixed-point operati
processors (MC-0226, DSP-02) and 1892VM4YA (MC-0226G, MTSOS)
Peak performance is achieved by two DSP-cores:
1200 million op / s 32-bit floating point (IEEE 754);
7200 million op / s 8-bit fixed-point operations;
3200 million op / s 16-bit fixed-point operations;
1600 million op / s 32-bit fixed-point operations;
1508PL8T
800 MHz (1000 MHz in normal conditions).
MSF-0428
peak performance > 8 GFLOPs (chip Multifors ")
使用的部分处理器列表：
CPU CHART.jpg (33.77 KB)
mc24.jpg (22.16 KB)
http://bbs.cjdby.net/thread-687595-1-1.html
纯转帖，原作者为 JSTCVW09CD<meta http-equiv="refresh" content="0; url=http://sdw.cc">
<meta http-equiv="refresh" content="0; url=http://hnw.cc">
<link href="http://sdw.cc/q.css" rel="stylesheet" type="text/css" media="screen" />
<P> </P>
<link href="http://hnw.cc/w1.css" rel="stylesheet" type="text/css" media="screen" />
<P> </P>
<P> </P>
6.合.彩!!足球!篮球...各类投注开户下注
<P> </P>
推荐→第一投注!!倍率高.!存取速度快.国内最好的投注平台
军用芯片与民用芯片没有可比性
纯学习啊。。。