超级军网高端军用嵌入式应用开始向intel迁移
来源：百度文库 编辑：超级军网 时间：2024/04/29 23:25:00
http://mae.pennnet.com/display_a ... g-a-shift-to-Intel/
看来很多人都是不看英文的，我还是辛苦点，粗了翻一下吧
Trends in microprocessors: high-end military embedded applications are beginning a shift to Intel
高端军用嵌入式应用开始向intel迁移 By John Keller
When it comes to military embedded computing, basically only two microprocessor manufacturers slug it out for the lion’s share of the defense and aerospace embedded computer market—Freescale Semiconductor Inc. in Austin, Texas, and Intel Corp. of Santa Clara, Calif.
目前国防和航空嵌入式计算市场有两个选择： Freescale 在奥斯丁，和intel 在santa calra
While Freescale has been this market’s 500-pound gorilla for some time, Intel’s latest introduction of its Core i7 microprocessor in January is tipping the defense embedded systems community on its head in a transformation the likes of which seasoned observers have not seen in years.
Freescale像一个500磅的黑猩猩一样占有这个市场一段时间了， inte在一月推出了的Core I7微处理器将会颠覆这个市场
The newest Core i7 “is unlike anything we’ve got,” says Frank Willis, director of military and aerospace product development at GE Intelligent Platforms in Albuquerque, N.M. “It’s going to set the standard for performance as we move ahead. This gives Intel unbelievable capability and entry into the market.”
新的Core I7“ 和从前完全不一样” ，佛兰克.威尔士说 ，他是位于新墨西哥州的阿尔布开克的GE 智能平台的 军用宇航产品开发部的总监
“它设定了新的性能标准就像我们努力地那样，这给了intel难以置信的技术水准，进入这市场”
Sure, there are plenty of other important microprocessor makers—Advanced Micro Devices Inc. (AMD) of Sunnyvale, Calif.; ARM Inc. of Los Gatos, Calif.; Cavium Networks of Mountain View, Calif.; and MIPS Technologies Inc. of Mountain View, Calif. among them—but for military embedded applications, Freescale primarily, and to a lesser extent Intel, have been the processors of choice.
当然，现存有充分的重要的处理器制造商--- AMD, Cavium networks， MIPS。但是就军用嵌入式的引用来看 ，Freescale在过去的岁月里，稍微胜出intel而成为首选。
Of the leading two companies, Freescale by far has been the more dominant over the past several years based on its marquee embedded microprocessor, the Power PC (and later Power Architecture) with the AltiVec floating point and integer SIMD instruction set—for applications like radar, sonar, and signals intelligence that need floating-point processing.
Freescale占有市场的利器PowerPC （ 后来的power 架构） ，最重要的特性- Altivec 浮架构和单指令流多数据流指令集，非常适合雷达，声纳和其他信号处理系统，这些系统都需要浮点处理能力
The performance, flexibility, and power consumption of the Power Architecture has kept Freescale on the top of the mountain for a long time, and not just because of floating-point processing. The Power Architecture also fits well with the VME backplane databus that has dominated military embedded computing for much of the chip’s reign.
不仅因为浮点性能，性能，灵活性，power架构的能耗 都使得freescale上期处于市场的巅峰， power架构和VME背板总线长期统治军用嵌入式计算环境（注： freescale 芯片直接能引出VME总线，不需要桥接芯片）。
Aerospace and defense systems designers, despite getting what they needed from Freescale, always wanted an alternative source of microprocessors, just in case Freescale changed their microprocessor architectures.
宇航和国防系统设计者，尽管清楚他们需要Freescale，但是他们换需要另外的处理器来源，防止Freescale改变处理器架构
For a while, defense and aerospace embedded computer makers hung their hopes on a company in Santa Clara, Calif., called P.A. Semi as an alternative to Freescale. P.A. Semi experts were developing a powerful and power-efficient Power Architecture processor called PWRficient, which met their needs. Hopes were dashed, however, when Apple Computer acquired P.A. Semi, and took P.A. Semi products off the open market.
他们曾经寄希望于另外一个公司，P.A 作为freescale的替代品， P.A的专家开发一种性能强劲，功耗优良的处理器叫做PWRficien，能满足军方的需求。但是希望落空了，apple收购了P.A，P.A转向了开放市场
Then the fears of high-end military systems designers were realized. Freescale, in a bid to dominate the cell phone and handheld appliance market, decided to abandon AltiVec and floating-point capability in its latest generation of microprocessors, which dropped a monkey wrench into long-term planning among the military embedded computing companies. “The Freescale PowerPC roadmap is dead-ended now at AltiVec,” says Doug Patterson, vice president of marketing at Aitech Defense Systems Inc. in Chatsworth, Calif.
然后让他们担心的事情发生了，Freescale 决定在下一代的处理器仲放弃AltiVec和浮点性能，这有些戏弄那些以freescale作为长期策略和计划的嵌入式计算业者。
"Freescale PowerPC roadmap结束了Altivec“ ，doug patterson说，他是Aitech国防系统的主管市场的副总裁
Then Intel quietly made it known that help was on the way; the company was working on a high-performance, low-power chip with floating-point capability. Embedded computer designers made plans to take advantage.
intel 让许多人相信他们能够帮助解决这问题，他在生产高性能，低功耗和优良浮点运算的处理器，嵌入式业者计划采用这些优势产皮
Intel formally altered the balance in January 2010 with its announcement of the latest-generation Core i7 microprocessor with floating-point capability. Several embedded computing products aimed at aerospace and defense applications were introduced within hours of the Intel Core i7 introduction, with additional products coming out nearly every day afterwards.
intel宣布了最新的Core i7，几个嵌入式业着随后在咋这个会上宣布很快将会推出相关产品
“The biggest feature of the Core i7 is the floating-point performance,” says Ben Klam, vice president of engineering at Extreme Engineering Solutions (X-ES) in Middleton, Wis. “Now they are getting into lower-power embedded applications with good performance, which will help any military applications that benefit from floating point, like radar and signal processing.”
”I7 最大的性能优势是浮点处理能力“ ben klam说，他是X-ES的工程副总裁” 现在我们将会有良好性能，同时较低功耗的应用产品，这将使得雷达和其他需要浮点处理能力的军用应用系统从中获益“
None of this is to say that Freescale will not be part of aerospace and defense applications in the future; far from it.
这并非说，Freesc从此不再在宇航和国防应用中出现
Steve Edwards, chief technology officer at Curtiss-Wright Controls Embedded Computing in Leesburg, Va., says the military and aerospace embedded computing market essentially has three components—high-end digital signal processing (DSP) applications; general-purpose processing; and low-power mobile applications.
Steve Edwards， Curtiss-Wright 的技术总监，说军用和余杭市场有3种必须的器件
-高端DSP，通用处理器，低功耗mobile应用
Edwards says Intel may well come to dominate military DSP applications in the near term because of the Core i7’s floating-point capability, yet he sees continued vigorous competition between Intel and Freescale in general-purpose processing and low-power embedded computing applications.
Edwards说intel也许会很愿意进入DSP 应用市场，因为他的CoreI7拥有良好的浮点性能，
他看到intel和Freescale 在GPCPU和低功耗mobile computing中持续激烈的竞争
General-purpose processing in aerospace and defense applications “is split between the Power Architecture and Intel,” Edwards says. “We see a huge market for the Freescale Power Architecture for highly integrated applications that need multiple cores, Ethernet controllers, and very small-footprint solutions.”
GP 市场分成了 Power架构和intel架构，Edwards说，“ 我看到Freescale一个巨大的市场 那就是高集成度应用-他们需要多核，以太网控制器，小的体积和PCB面积等等”
General-purpose processing applications moving into the Intel camp, meanwhile, favor Intel’s tie-in with the Windows desktop operating system, other commercial software with familiar man-machine interfaces, and embedded Linux, he says.
GPP 将迁移到intel平台，同时和intel关系紧密的windows 桌面平台，其他的商用软件，比如我们熟悉的人际界面和linux等等都将相继而来
Low-power applications such as man-portable systems and small unmanned aerial vehicle (UAV) payloads also should remain a tossup between Intel and Freescale in the future, Edwards says, as both companies offer equivalent products.
低功耗市场，比如单兵便携系统，无人机 将维持现在的竞争态势，intel和free都提供相应的产品
In high-end DSP applications, however, aerospace and defense systems designers are coming out with distinct preferences for the new Intel microprocessor. “The bar for this capability has been set,” says GE’s Willis. “You will have to see Freescale step up to this level to stay competitive.”
在高端DSP应用，宇航和军用系统设计者已经清楚的认识到intel的性能 “ 标杆已经设立” wills说“ 我们将不得不看到Freescale需要努力达到这个水准，才能维持竞争力”
http://mae.pennnet.com/display_a ... g-a-shift-to-Intel/
看来很多人都是不看英文的，我还是辛苦点，粗了翻一下吧
Trends in microprocessors: high-end military embedded applications are beginning a shift to Intel
高端军用嵌入式应用开始向intel迁移 By John Keller
When it comes to military embedded computing, basically only two microprocessor manufacturers slug it out for the lion’s share of the defense and aerospace embedded computer market—Freescale Semiconductor Inc. in Austin, Texas, and Intel Corp. of Santa Clara, Calif.
目前国防和航空嵌入式计算市场有两个选择： Freescale 在奥斯丁，和intel 在santa calra
While Freescale has been this market’s 500-pound gorilla for some time, Intel’s latest introduction of its Core i7 microprocessor in January is tipping the defense embedded systems community on its head in a transformation the likes of which seasoned observers have not seen in years.
Freescale像一个500磅的黑猩猩一样占有这个市场一段时间了， inte在一月推出了的Core I7微处理器将会颠覆这个市场
The newest Core i7 “is unlike anything we’ve got,” says Frank Willis, director of military and aerospace product development at GE Intelligent Platforms in Albuquerque, N.M. “It’s going to set the standard for performance as we move ahead. This gives Intel unbelievable capability and entry into the market.”
新的Core I7“ 和从前完全不一样” ，佛兰克.威尔士说 ，他是位于新墨西哥州的阿尔布开克的GE 智能平台的 军用宇航产品开发部的总监
“它设定了新的性能标准就像我们努力地那样，这给了intel难以置信的技术水准，进入这市场”
Sure, there are plenty of other important microprocessor makers—Advanced Micro Devices Inc. (AMD) of Sunnyvale, Calif.; ARM Inc. of Los Gatos, Calif.; Cavium Networks of Mountain View, Calif.; and MIPS Technologies Inc. of Mountain View, Calif. among them—but for military embedded applications, Freescale primarily, and to a lesser extent Intel, have been the processors of choice.
当然，现存有充分的重要的处理器制造商--- AMD, Cavium networks， MIPS。但是就军用嵌入式的引用来看 ，Freescale在过去的岁月里，稍微胜出intel而成为首选。
Of the leading two companies, Freescale by far has been the more dominant over the past several years based on its marquee embedded microprocessor, the Power PC (and later Power Architecture) with the AltiVec floating point and integer SIMD instruction set—for applications like radar, sonar, and signals intelligence that need floating-point processing.
Freescale占有市场的利器PowerPC （ 后来的power 架构） ，最重要的特性- Altivec 浮架构和单指令流多数据流指令集，非常适合雷达，声纳和其他信号处理系统，这些系统都需要浮点处理能力
The performance, flexibility, and power consumption of the Power Architecture has kept Freescale on the top of the mountain for a long time, and not just because of floating-point processing. The Power Architecture also fits well with the VME backplane databus that has dominated military embedded computing for much of the chip’s reign.
不仅因为浮点性能，性能，灵活性，power架构的能耗 都使得freescale上期处于市场的巅峰， power架构和VME背板总线长期统治军用嵌入式计算环境（注： freescale 芯片直接能引出VME总线，不需要桥接芯片）。
Aerospace and defense systems designers, despite getting what they needed from Freescale, always wanted an alternative source of microprocessors, just in case Freescale changed their microprocessor architectures.
宇航和国防系统设计者，尽管清楚他们需要Freescale，但是他们换需要另外的处理器来源，防止Freescale改变处理器架构
For a while, defense and aerospace embedded computer makers hung their hopes on a company in Santa Clara, Calif., called P.A. Semi as an alternative to Freescale. P.A. Semi experts were developing a powerful and power-efficient Power Architecture processor called PWRficient, which met their needs. Hopes were dashed, however, when Apple Computer acquired P.A. Semi, and took P.A. Semi products off the open market.
他们曾经寄希望于另外一个公司，P.A 作为freescale的替代品， P.A的专家开发一种性能强劲，功耗优良的处理器叫做PWRficien，能满足军方的需求。但是希望落空了，apple收购了P.A，P.A转向了开放市场
Then the fears of high-end military systems designers were realized. Freescale, in a bid to dominate the cell phone and handheld appliance market, decided to abandon AltiVec and floating-point capability in its latest generation of microprocessors, which dropped a monkey wrench into long-term planning among the military embedded computing companies. “The Freescale PowerPC roadmap is dead-ended now at AltiVec,” says Doug Patterson, vice president of marketing at Aitech Defense Systems Inc. in Chatsworth, Calif.
然后让他们担心的事情发生了，Freescale 决定在下一代的处理器仲放弃AltiVec和浮点性能，这有些戏弄那些以freescale作为长期策略和计划的嵌入式计算业者。
"Freescale PowerPC roadmap结束了Altivec“ ，doug patterson说，他是Aitech国防系统的主管市场的副总裁
Then Intel quietly made it known that help was on the way; the company was working on a high-performance, low-power chip with floating-point capability. Embedded computer designers made plans to take advantage.
intel 让许多人相信他们能够帮助解决这问题，他在生产高性能，低功耗和优良浮点运算的处理器，嵌入式业者计划采用这些优势产皮
Intel formally altered the balance in January 2010 with its announcement of the latest-generation Core i7 microprocessor with floating-point capability. Several embedded computing products aimed at aerospace and defense applications were introduced within hours of the Intel Core i7 introduction, with additional products coming out nearly every day afterwards.
intel宣布了最新的Core i7，几个嵌入式业着随后在咋这个会上宣布很快将会推出相关产品
“The biggest feature of the Core i7 is the floating-point performance,” says Ben Klam, vice president of engineering at Extreme Engineering Solutions (X-ES) in Middleton, Wis. “Now they are getting into lower-power embedded applications with good performance, which will help any military applications that benefit from floating point, like radar and signal processing.”
”I7 最大的性能优势是浮点处理能力“ ben klam说，他是X-ES的工程副总裁” 现在我们将会有良好性能，同时较低功耗的应用产品，这将使得雷达和其他需要浮点处理能力的军用应用系统从中获益“
None of this is to say that Freescale will not be part of aerospace and defense applications in the future; far from it.
这并非说，Freesc从此不再在宇航和国防应用中出现
Steve Edwards, chief technology officer at Curtiss-Wright Controls Embedded Computing in Leesburg, Va., says the military and aerospace embedded computing market essentially has three components—high-end digital signal processing (DSP) applications; general-purpose processing; and low-power mobile applications.
Steve Edwards， Curtiss-Wright 的技术总监，说军用和余杭市场有3种必须的器件
-高端DSP，通用处理器，低功耗mobile应用
Edwards says Intel may well come to dominate military DSP applications in the near term because of the Core i7’s floating-point capability, yet he sees continued vigorous competition between Intel and Freescale in general-purpose processing and low-power embedded computing applications.
Edwards说intel也许会很愿意进入DSP 应用市场，因为他的CoreI7拥有良好的浮点性能，
他看到intel和Freescale 在GPCPU和低功耗mobile computing中持续激烈的竞争
General-purpose processing in aerospace and defense applications “is split between the Power Architecture and Intel,” Edwards says. “We see a huge market for the Freescale Power Architecture for highly integrated applications that need multiple cores, Ethernet controllers, and very small-footprint solutions.”
GP 市场分成了 Power架构和intel架构，Edwards说，“ 我看到Freescale一个巨大的市场 那就是高集成度应用-他们需要多核，以太网控制器，小的体积和PCB面积等等”
General-purpose processing applications moving into the Intel camp, meanwhile, favor Intel’s tie-in with the Windows desktop operating system, other commercial software with familiar man-machine interfaces, and embedded Linux, he says.
GPP 将迁移到intel平台，同时和intel关系紧密的windows 桌面平台，其他的商用软件，比如我们熟悉的人际界面和linux等等都将相继而来
Low-power applications such as man-portable systems and small unmanned aerial vehicle (UAV) payloads also should remain a tossup between Intel and Freescale in the future, Edwards says, as both companies offer equivalent products.
低功耗市场，比如单兵便携系统，无人机 将维持现在的竞争态势，intel和free都提供相应的产品
In high-end DSP applications, however, aerospace and defense systems designers are coming out with distinct preferences for the new Intel microprocessor. “The bar for this capability has been set,” says GE’s Willis. “You will have to see Freescale step up to this level to stay competitive.”
在高端DSP应用，宇航和军用系统设计者已经清楚的认识到intel的性能 “ 标杆已经设立” wills说“ 我们将不得不看到Freescale需要努力达到这个水准，才能维持竞争力”
我依然看好IBM
x86现在在工控领域都不见得前途光明
x86现在在工控领域都不见得前途光明
DDG马上就换I7了，我原来的同事都在研究SSE4.1
Intel的优势在于巨大的X86处理器出货量可以有效的摊薄研发成本。美军现在对装备价格也比较敏感了，Intel的价格优势就体现出来了。
intel的功耗是很大问题。
tmp-time 发表于 2010-3-7 22:15 
拿ARM的手机处理器和Intel的桌面级处理器比功耗是不公平的，两者的性能不在一个级别上的。
ARM的架构功耗很小，但是性能做不强的。Intel的架构则是需要考虑高性能服务器的需求。两者的设计方向完全相反。直到去年，Intel才推出了专门优化功耗的Atom系列处理器。
拿ARM的手机处理器和Intel的桌面级处理器比功耗是不公平的，两者的性能不在一个级别上的。
ARM的架构功耗很小，但是性能做不强的。Intel的架构则是需要考虑高性能服务器的需求。两者的设计方向完全相反。直到去年，Intel才推出了专门优化功耗的Atom系列处理器。
看来大家都不看主贴就发言，我翻译了一下，大家看看再讨论
好多高科技的东西啊
回复 7# hillsboro1
你能不能开个军用处理器的科普贴，好多东西看不懂啊。
你能不能开个军用处理器的科普贴，好多东西看不懂啊。
hillsboro1 发表于 2010-3-7 21:53
TI/ADI联合发来贺电
TI/ADI联合发来贺电
就光一个散热问题，I7就飞不起来
做地面设备还将就
做地面设备还将就
qnxchina 发表于 2010-3-8 19:29
当年Apple是解决不了PowerPC的功耗问题才投奔Intel的。:D
Intel的产能放在那里，特挑一批低功耗芯片没啥难度。
当年Apple是解决不了PowerPC的功耗问题才投奔Intel的。:D
Intel的产能放在那里，特挑一批低功耗芯片没啥难度。
军民一体的体现。。TG真值得学。。。民用配件上军用。。我说的是整和趋势。。这个前提是TG有米帝那样不错的东西。。龙芯估计可以。。不过龙芯民用版好久大爆发。。占领更多的市场。。
军民一体的体现。。TG真值得学。。。民用配件上军用。。我说的是整和趋势。。这个前提是TG有米帝那样不错的东西。。龙芯估计可以。。不过龙芯民用版好久大爆发。。占领更多的市场。。
http://www.xes-inc.com/
懒得再吵，自己去看吧，看看openvpx怎么出笼的，openvpx blade2blade热容量是135w，还用不了I7，
无人机用microserver都1年多了，还在吵吵不能上飞机
看看XES上i7怎么安装的 ，航空系统有散热问题，但是同样不要忘了，没有噪音要求。
i
懒得再吵，自己去看吧，看看openvpx怎么出笼的，openvpx blade2blade热容量是135w，还用不了I7，
无人机用microserver都1年多了，还在吵吵不能上飞机
看看XES上i7怎么安装的 ，航空系统有散热问题，但是同样不要忘了，没有噪音要求。
i
Signal processing evolution
Since the 1990s, processors from the PowerPC family (also known as Power Architecture) and their AltiVec floating-point vector math unit have been the dominant choice for open-system COTS boards used in high-performance embedded military DSP applications. These applications include radar, signals intelligence, sonar, and image processing. Previously, such systems were largely implemented with specialized processors such as the Intel i860, the Texas Instruments 320C40, and the Analog Devices SHARC. These processors were popular because of their floating-point performance.
In the late 1990s, the COTS market turned to the PowerPC processors developed by an alliance of Apple, IBM, and Motorola (later Freescale) and intended for personal computers. The resultant high-performance microprocessor was based on a RISC architecture, but it was the introduction of the AltiVec instruction unit in the Motorola PowerPC 7400 (“G4”) that changed the signal processing landscape.
Signal processing experts were quick to recognize that the floating-point capable AltiVec unit could greatly accelerate the inner-loop processing found in common functions such as Fast Fourier Transforms (FFTs). AltiVec’s ability to perform up to four simultaneous floating-point multiplies and additions was, at the time, revolutionary.
FFT performance on an Intel Core i7 processor
One of the most common signal processing algorithms is the FFT. The FFT implementation shown in Figure 1 is a version that is included in the Intel Performance Primitive (IPP) library.
Figure 1: FFT performance in GFLOPS
(click graphic to zoom by 1.6x)
This example uses 32-bit single-precision complex floating-point samples. The FFT is implemented for different sizes, and the number of cycles per sample has been measured. The results were profiled on an Intel Core i7 processor running at 2.67 GHz. The processor has four cores, but these tests only use a single thread. (Note that the Intel Core i7 processor utilizes the Intel Microarchitecture in a 32 nm fabrication process.)
The IPP implementation of an N point FFT uses a complex multiplication taking six operations (2MUL & 2ADD) and a complex addition taking two operations (2ADD) for each point. Since a MUL takes four operations, this amounts to 8N.log2N floating-point operations (FLOPS). By calculating the number of FLOPS per cycle, the sustained GigaFLOP performance can be derived. A single core is capable of 20 to 30 GFLOPS for FFT execution, which is up to more than 90 percent of theoretical capability.
In the meantime, Intel continued to develop the floating-point capability of its own processors, including a vector-processing unit generically known as Streaming SIMD Extensions (SSEs), first introduced in the Pentium III processor. Intel has continually added features and new instructions, culminating in the current implementation, SSE 4.2.
Like AltiVec, SSE is a 128-bit wide processing unit, capable of simultaneously operating on four 32-bit floating-point values. SSE also features support for double-precision floating point, a feature that was never included in AltiVec. (Note that Freescale has decided not to include the AltiVec unit in its latest high-performance processor, the QorIQ P4080. The P4080, announced last year, is an excellent CPU for single board computer designs because of its eight cores, integrated memory controllers, and Serial RapidIO interface; however, it features a regular floating-point capability that is not the vector processor type required to attain the floating-point performance needed for signal processing applications.) In multicore Intel processors, each core has its own SSE unit, so the raw floating-point performance scales with the number of cores.
Additionally, Intel x86 processors are classic CISC processors. Successive generations of Intel processors continue to dispatch more instructions per clock. Since many more instructions are executed per clock cycle and the code density is higher, Intel processors can perform more than twice the useful work per clock cycle as a Freescale RISC processor. As a result, beginning with Intel Core i7 dual-core processors, the low-power, high-performance advantages of the Intel Architecture processor technology can be used for the first time to design products such as DSP engines for the rugged deployed COTS signal processing space.
Intel Architecture meets signal processing performance needs
The latest generations of Intel Architecture processors are produced on 45 nm and 32 nm process technologies and are based on the Intel Microarchitecture, which includes many features that suit high performance and power-efficient execution of signal processing workloads.
To support high instruction throughput, the Intel Microarchitecture contains a sophisticated memory subsystem. In a quad-core processor, each core contains a first-level instruction cache (32 KB 4-way), a first-level data cache (32 KB 8-way), a second-level unified cache (256 KB 8-way), and a third-level cache of up to 8 MB 16-way that is shared among all the processor cores. With 2 or 3 DDR3 memory controllers, the processor can provide a peak memory bandwidth of 17.1 or 25.6 GBps. This high-throughput capability is required to support the multi-gigabit rates for the processing of the sample streams in military signal processing applications such as radar.
Support for the efficient implementation of high-throughput signal processing is based on SSE instructions, which are extensions to the standard Intel Instruction Set Architecture (ISA). Including the latest generation, SSE 4.2, there are more than 300 SSE instructions. SSE operations work from a set of 16 128-bit wide XMMx registers, capable of simultaneous operation on four packed floating-point values, as well as other formats.
Effective implementation of signal processing algorithms requires efficient use of all resources on the processor platform, so the ability to parallelize algorithms across multiple cores in a linear manner is essential. Parallelized scaling across the multiple cores of an Intel Microarchitecture-based platform can be executed for common operations used in signal processing such as complex multiplication, or for more computationally intense algorithms. A threading model can be used to implement the complex multiplication algorithm with parallel execution.
A single quad-core processor Intel Core i7 platform can be used to execute the complex floating-point multiplications. The results depicted in Figure 2 show the expected linear performance scaling from one to four threads, as additional cores and SSE vector units are employed in the algorithm. The eight-thread case demonstrates that additional efficiency can be obtained from the hyper-threading feature of the cores, even though the floating-point calculation resources of the core remain the same between the four-thread and eight-thread case.
Figure 2: FFT performance: GFLOPS versus number of threads
(click graphic to zoom by 1.5x)
Curtiss-Wright’s first multiprocessor DSP board products will be based on the recently announced dual-core Intel Core i7 610e. The first two products based on the Intel Microarchitecture are the CHAMP-AV5 6U VME64x DSP engine and the SVME/DMV-1905 SBC. Additionally, an Intel Core i7 architecture dual-core processor OpenVPX Ready (VITA 65) variant of the CHAMP-AV5 DSP, the CHAMP-AV7, is scheduled for release in the summer of 2010. Using two 2.53 GHz dual-core Intel Core i7 processors, the CHAMP-AV5 delivers performance rated up to 81 GFLOPS. With 4 MB of cache and two hardware threads per core, the Core i7 can process larger vectors at peak rates significantly greater than was possible with previous AltiVec-based systems.
Since the 1990s, processors from the PowerPC family (also known as Power Architecture) and their AltiVec floating-point vector math unit have been the dominant choice for open-system COTS boards used in high-performance embedded military DSP applications. These applications include radar, signals intelligence, sonar, and image processing. Previously, such systems were largely implemented with specialized processors such as the Intel i860, the Texas Instruments 320C40, and the Analog Devices SHARC. These processors were popular because of their floating-point performance.
In the late 1990s, the COTS market turned to the PowerPC processors developed by an alliance of Apple, IBM, and Motorola (later Freescale) and intended for personal computers. The resultant high-performance microprocessor was based on a RISC architecture, but it was the introduction of the AltiVec instruction unit in the Motorola PowerPC 7400 (“G4”) that changed the signal processing landscape.
Signal processing experts were quick to recognize that the floating-point capable AltiVec unit could greatly accelerate the inner-loop processing found in common functions such as Fast Fourier Transforms (FFTs). AltiVec’s ability to perform up to four simultaneous floating-point multiplies and additions was, at the time, revolutionary.
FFT performance on an Intel Core i7 processor
One of the most common signal processing algorithms is the FFT. The FFT implementation shown in Figure 1 is a version that is included in the Intel Performance Primitive (IPP) library.
Figure 1: FFT performance in GFLOPS
(click graphic to zoom by 1.6x)
This example uses 32-bit single-precision complex floating-point samples. The FFT is implemented for different sizes, and the number of cycles per sample has been measured. The results were profiled on an Intel Core i7 processor running at 2.67 GHz. The processor has four cores, but these tests only use a single thread. (Note that the Intel Core i7 processor utilizes the Intel Microarchitecture in a 32 nm fabrication process.)
The IPP implementation of an N point FFT uses a complex multiplication taking six operations (2MUL & 2ADD) and a complex addition taking two operations (2ADD) for each point. Since a MUL takes four operations, this amounts to 8N.log2N floating-point operations (FLOPS). By calculating the number of FLOPS per cycle, the sustained GigaFLOP performance can be derived. A single core is capable of 20 to 30 GFLOPS for FFT execution, which is up to more than 90 percent of theoretical capability.
In the meantime, Intel continued to develop the floating-point capability of its own processors, including a vector-processing unit generically known as Streaming SIMD Extensions (SSEs), first introduced in the Pentium III processor. Intel has continually added features and new instructions, culminating in the current implementation, SSE 4.2.
Like AltiVec, SSE is a 128-bit wide processing unit, capable of simultaneously operating on four 32-bit floating-point values. SSE also features support for double-precision floating point, a feature that was never included in AltiVec. (Note that Freescale has decided not to include the AltiVec unit in its latest high-performance processor, the QorIQ P4080. The P4080, announced last year, is an excellent CPU for single board computer designs because of its eight cores, integrated memory controllers, and Serial RapidIO interface; however, it features a regular floating-point capability that is not the vector processor type required to attain the floating-point performance needed for signal processing applications.) In multicore Intel processors, each core has its own SSE unit, so the raw floating-point performance scales with the number of cores.
Additionally, Intel x86 processors are classic CISC processors. Successive generations of Intel processors continue to dispatch more instructions per clock. Since many more instructions are executed per clock cycle and the code density is higher, Intel processors can perform more than twice the useful work per clock cycle as a Freescale RISC processor. As a result, beginning with Intel Core i7 dual-core processors, the low-power, high-performance advantages of the Intel Architecture processor technology can be used for the first time to design products such as DSP engines for the rugged deployed COTS signal processing space.
Intel Architecture meets signal processing performance needs
The latest generations of Intel Architecture processors are produced on 45 nm and 32 nm process technologies and are based on the Intel Microarchitecture, which includes many features that suit high performance and power-efficient execution of signal processing workloads.
To support high instruction throughput, the Intel Microarchitecture contains a sophisticated memory subsystem. In a quad-core processor, each core contains a first-level instruction cache (32 KB 4-way), a first-level data cache (32 KB 8-way), a second-level unified cache (256 KB 8-way), and a third-level cache of up to 8 MB 16-way that is shared among all the processor cores. With 2 or 3 DDR3 memory controllers, the processor can provide a peak memory bandwidth of 17.1 or 25.6 GBps. This high-throughput capability is required to support the multi-gigabit rates for the processing of the sample streams in military signal processing applications such as radar.
Support for the efficient implementation of high-throughput signal processing is based on SSE instructions, which are extensions to the standard Intel Instruction Set Architecture (ISA). Including the latest generation, SSE 4.2, there are more than 300 SSE instructions. SSE operations work from a set of 16 128-bit wide XMMx registers, capable of simultaneous operation on four packed floating-point values, as well as other formats.
Effective implementation of signal processing algorithms requires efficient use of all resources on the processor platform, so the ability to parallelize algorithms across multiple cores in a linear manner is essential. Parallelized scaling across the multiple cores of an Intel Microarchitecture-based platform can be executed for common operations used in signal processing such as complex multiplication, or for more computationally intense algorithms. A threading model can be used to implement the complex multiplication algorithm with parallel execution.
A single quad-core processor Intel Core i7 platform can be used to execute the complex floating-point multiplications. The results depicted in Figure 2 show the expected linear performance scaling from one to four threads, as additional cores and SSE vector units are employed in the algorithm. The eight-thread case demonstrates that additional efficiency can be obtained from the hyper-threading feature of the cores, even though the floating-point calculation resources of the core remain the same between the four-thread and eight-thread case.
Figure 2: FFT performance: GFLOPS versus number of threads
(click graphic to zoom by 1.5x)
Curtiss-Wright’s first multiprocessor DSP board products will be based on the recently announced dual-core Intel Core i7 610e. The first two products based on the Intel Microarchitecture are the CHAMP-AV5 6U VME64x DSP engine and the SVME/DMV-1905 SBC. Additionally, an Intel Core i7 architecture dual-core processor OpenVPX Ready (VITA 65) variant of the CHAMP-AV5 DSP, the CHAMP-AV7, is scheduled for release in the summer of 2010. Using two 2.53 GHz dual-core Intel Core i7 processors, the CHAMP-AV5 delivers performance rated up to 81 GFLOPS. With 4 MB of cache and two hardware threads per core, the Core i7 can process larger vectors at peak rates significantly greater than was possible with previous AltiVec-based systems.
看懂上面的红字，再去找找TI、ADI
lixianglover 发表于 2010-3-8 20:01
当年苹果在IBM那里纯属成本问题，PPC的机器让你半米外听不到机器风扇的声音，说苹果搞不定散热？人家散热器是找汽车散热生产商设计的{:3_83:}
当年苹果在IBM那里纯属成本问题，PPC的机器让你半米外听不到机器风扇的声音，说苹果搞不定散热？人家散热器是找汽车散热生产商设计的{:3_83:}
回复 9# sl1983
不懂可以问，科普没方向，我也很怕打字
不懂可以问，科普没方向，我也很怕打字
当年苹果在IBM那里纯属成本问题，PPC的机器让你半米外听不到机器风扇的声音，说苹果搞不定散热？人家散 ...
qnxchina 发表于 2010-3-8 20:17
Apple ppc台式机散热问题严重到都被迫上水冷了，当然听不到风扇声音了,当年ppc处理器的Apple本子悲剧的续航能力就更不用提了。
换到Intel的芯片，双i7的Mac pro的CPU风道也只用了两个风扇，云泥之别啊。
当年苹果在IBM那里纯属成本问题，PPC的机器让你半米外听不到机器风扇的声音，说苹果搞不定散热？人家散 ...
qnxchina 发表于 2010-3-8 20:17
Apple ppc台式机散热问题严重到都被迫上水冷了，当然听不到风扇声音了,当年ppc处理器的Apple本子悲剧的续航能力就更不用提了。
换到Intel的芯片，双i7的Mac pro的CPU风道也只用了两个风扇，云泥之别啊。
lixianglover 发表于 2010-3-8 20:23
水冷？你见过苹果机么？
水冷？你见过苹果机么？
作为IT民工，我知道SSE4.1是07年底就出来的玩意儿
要研究嵌入式I7研究4.2去
要研究嵌入式I7研究4.2去
水冷？你见过苹果机么？
qnxchina 发表于 2010-3-8 20:42
G5就是水冷的，见识少就别出来现眼了。。。
水冷？你见过苹果机么？
qnxchina 发表于 2010-3-8 20:42
G5就是水冷的，见识少就别出来现眼了。。。
回复 22# lixianglover
MAC pro only use Xeon till now, no i7 in the option list.
And only dual G5 2.5/2.7GHz got a water cooling system, which is not common generally speaking
MAC pro only use Xeon till now, no i7 in the option list.
And only dual G5 2.5/2.7GHz got a water cooling system, which is not common generally speaking
龙芯功耗还是可以的，可惜成本和自身的制造工艺有问题。
回复 21# Dr.BT
4。2相比4.1增加的指令是xml和串操作的，和浮点性能无关，做DSP的都是从4.1做起
www.nasoftware.co.uk
4。2相比4.1增加的指令是xml和串操作的，和浮点性能无关，做DSP的都是从4.1做起
www.nasoftware.co.uk
性能比较，fft算法时间
说i7浮点好，可以做dsp
cuda笑了，
cuda笑了，
amlta 发表于 2010-3-9 21:22
CUDA的浮点只在特定并行计算中有用，乱凑什么热闹。
真要扯理论浮点性能，NV也排不了第一，5870就有2.72Tflops的理论峰值了。
CUDA的浮点只在特定并行计算中有用，乱凑什么热闹。
真要扯理论浮点性能，NV也排不了第一，5870就有2.72Tflops的理论峰值了。
不看上面的文章，就直接来
航空电子和军用系统需要的是GPCPU+ DSP
也就是所谓housekeeping（ GPCPU)+ performance killer（DSP）
比如power+Altivec，i7 NB在这两个方面都是超厉害，所以才这么热 ，CUDA直接能干活吗，能有IO process?能够做GPCPU?
航空电子和军用系统需要的是GPCPU+ DSP
也就是所谓housekeeping（ GPCPU)+ performance killer（DSP）
比如power+Altivec，i7 NB在这两个方面都是超厉害，所以才这么热 ，CUDA直接能干活吗，能有IO process?能够做GPCPU?
CD军用CPU难得的好帖
hillsboro兄，能否跟版主商量一下，将帖子移到二炮版面
hillsboro兄，能否跟版主商量一下，将帖子移到二炮版面
我不知道怎么弄啊，我无所谓的
我承认我堕落了:L
hillsboro1 发表于 2010-3-9 21:46
I7的稳定性可以军用了么？小白求教
I7的稳定性可以军用了么？小白求教
hellblack 发表于 2010-3-9 23:50
军用当然会用i7的服务器版本Xeon系列，特挑芯片+支持ECC，稳定性没问题的。
军用当然会用i7的服务器版本Xeon系列，特挑芯片+支持ECC，稳定性没问题的。
http://xes-inc.com/Products/XPed ... html#specifications
不需要那么麻烦，I7很稳定，高温靠传导散热或者空气对流散热。科普一下所谓的高低温条件
比如求-55度到+85 度，这个对现代的的cpu纯粹小case，高温可以加大气流，加大传热版。
这里有个细节要注意，军用航空用的电脑对噪声无要求，不是民用的，所以高温散热很好解决，热管等等都非常成熟，而且COREI7 并不比freescale功耗大更多。
至于低温这是国内的某些为特殊利益集团辩护的人常玩的把戏，给你举个简单例子，日本很多发烧友用液氮给CPU制冷玩超频，稳定运行一天的多去了，再说现在的pentiumIII能用，corei7不能用了
从工业品筛选足够满足所有军用和航空要求，宇航级别不行。
不需要那么麻烦，I7很稳定，高温靠传导散热或者空气对流散热。科普一下所谓的高低温条件
比如求-55度到+85 度，这个对现代的的cpu纯粹小case，高温可以加大气流，加大传热版。
这里有个细节要注意，军用航空用的电脑对噪声无要求，不是民用的，所以高温散热很好解决，热管等等都非常成熟，而且COREI7 并不比freescale功耗大更多。
至于低温这是国内的某些为特殊利益集团辩护的人常玩的把戏，给你举个简单例子，日本很多发烧友用液氮给CPU制冷玩超频，稳定运行一天的多去了，再说现在的pentiumIII能用，corei7不能用了
从工业品筛选足够满足所有军用和航空要求，宇航级别不行。
这段翻译的是不是有问题？
however, when Apple Computer acquired P.A. Semi, and took P.A. Semi products off the open market.
however, when Apple Computer acquired P.A. Semi, and took P.A. Semi products off the open market.
回复 36# buckeyes
yes,我粗略翻了一下，没仔细看
应该是Apple收购了P.A，P.A就从市场消失了
多谢指正，我很怕打字，所以粗略的翻译了一下，大意思是对的
回复 36# buckeyes
yes,我粗略翻了一下，没仔细看
应该是Apple收购了P.A，P.A就从市场消失了
多谢指正，我很怕打字，所以粗略的翻译了一下，大意思是对的
P.A,不是新出的ipad用的那个木。。。
不过，貌似太吹嘘altivec了。。。真做FFT的，不用dsp，用powerpc或者x86系列，有点。。。
为啥军方不考虑cell这玩意，不过貌似ibm已经放弃了。。。
不过，貌似太吹嘘altivec了。。。真做FFT的，不用dsp，用powerpc或者x86系列，有点。。。
为啥军方不考虑cell这玩意，不过貌似ibm已经放弃了。。。
Dr.BT 发表于 2010-3-8 20:43
感觉相对还是4.1靠谱的，毕竟4.2都是跟啥xml解析啊，字符处理相关。。。
不过IPP这玩意，啥平台都能用吗。。。
还是说自己裸写。。。
感觉相对还是4.1靠谱的，毕竟4.2都是跟啥xml解析啊，字符处理相关。。。
不过IPP这玩意，啥平台都能用吗。。。
还是说自己裸写。。。
hillsboro1 发表于 2010-3-10 01:34
辛辛苦苦给我们科普也挺不容易的。
多谢了！
辛辛苦苦给我们科普也挺不容易的。
多谢了！