我发一个我写的程序,放到鬼子,棒子,毛子,阿三,突厥 ...
来源:百度文库 编辑:超级军网 时间:2024/04/28 16:09:55
硬件平台:NXP LPC2103
软件平台:keil RL-ARM(keil为ARM专门做的操作系统)
功能:UART的底层驱动
#include "uart.h"
//static
UartQueue_t Uart0Queue;
UartQueue_t Uart1Queue;
/*************************************************************************************************
* Name : UartQueueInit
* Describe : 初始化串口缓存
* Input : 要初始化的缓存地址
* Output : 无
* Create by : 罗一鸣 Date: 2012年7月09日
* Moid by :
*************************************************************************************************/
static BOOL UartQueueInit(UartQueue_t* queue)
{
//init rx
if(NULL != queue->rxBuf)
{
os_free(queue->rxBuf);
queue->rxBuf = NULL;
}
queue->rxBuf = os_malloc(UART_RX_SIZE);
if(NULL == queue->rxBuf)
{
return FALSE;
}
os_sem_init (queue->rxSem, 0);
os_sem_init (queue->rxPort, 1);
queue->rxPush = queue->rxBuf;
queue->rxPop = queue->rxBuf;
//init tx
if(NULL != queue->txBuf)
{
os_free(queue->txBuf);
queue->txBuf = NULL;
}
queue->txBuf = os_malloc(UART_TX_SIZE);
if(NULL == queue->txBuf)
{
return FALSE;
}
os_sem_init (queue->txSem,UART_TX_SIZE);
os_sem_init (queue->txPort, 1);
queue->txPush = queue->txBuf;
queue->txPop = queue->txBuf;
return TRUE;
}
/*
UART0 ISR
*/
__inline void Uart0RxIsr(void)
{
INT8U c;
INT16U cnt;
cnt = OS_SEM_TOKENS(Uart0Queue.rxSem);
c = U0RBR;
if(cnt < UART_RX_SIZE)
{
cnt++;
isr_sem_send(Uart0Queue.rxSem);
*Uart0Queue.rxPush = c;
Uart0Queue.rxPush++;
if(Uart0Queue.rxPush == &Uart0Queue.rxBuf[UART_RX_SIZE])
{
Uart0Queue.rxPush = Uart0Queue.rxBuf;
}
}
}
__inline void Uart0TxIsr(void)
{
INT16U cnt;
cnt = OS_SEM_TOKENS(Uart0Queue.txSem);
isr_sem_send(Uart0Queue.txSem);
Uart0Queue.txPop++;
if(Uart0Queue.txPop == &Uart0Queue.txBuf[UART_TX_SIZE])
{
Uart0Queue.txPop = Uart0Queue.txBuf;
}
cnt++;
if(cnt < UART_TX_SIZE)
{
U0THR = *Uart0Queue.txPop;//break;
}
else
{
U0IER &= ~0x02;
}
}
void UART0_IRQ(void) __irq
{
INT32U INT_ID;
INT_ID = U0IIR & 0x0E;
switch(INT_ID)
{
case 0x04:
case 0x0C:
Uart0RxIsr();
break;
case 0x02:
Uart0TxIsr();
break;
default:
break;
}
VICVectAddr = 0; /* Acknowledge Interrupt */
}
/*
UART1 ISR
*/
__inline void Uart1RxIsr(void)
{
INT16U c,cnt;
cnt = OS_SEM_TOKENS(Uart1Queue.rxSem);
c = U1RBR;
if(cnt < UART_RX_SIZE)
{
isr_sem_send(Uart1Queue.rxSem);
cnt++;
*Uart1Queue.rxPush = c;
Uart1Queue.rxPush++;
if(Uart1Queue.rxPush == &Uart1Queue.rxBuf[UART_RX_SIZE])
{
Uart1Queue.rxPush = Uart1Queue.rxBuf;
}
}
}
__inline void Uart1TxIsr(void)
{
INT16U cnt;
cnt = OS_SEM_TOKENS(Uart1Queue.txSem);
isr_sem_send(Uart1Queue.txSem);
Uart1Queue.txPop++;
if(Uart1Queue.txPop == &Uart1Queue.txBuf[UART_TX_SIZE])
{
Uart1Queue.txPop = Uart1Queue.txBuf;
}
cnt++;
if(cnt < UART_TX_SIZE)
{
U1THR = *Uart1Queue.txPop;//break;
}
else
{
U1IER &= ~0x02;
}
}
void UART1_IRQ(void) __irq
{
INT32U INT_ID;
INT_ID = U1IIR & 0x0E;
if ((0x04 == INT_ID) || (0x0C == INT_ID))
{
/* Receive interrupt */
Uart1RxIsr();
}
else if (0x02 == INT_ID)
{
/* Transmit interrupt */
Uart1TxIsr();
}
VICVectAddr = 0; /* Acknowledge Interrupt */
}
/* UART INIT */
void UartIntConfig(INT8U port,INT8U slot,INT32U baud)
{
if(port == PORT_UART0)
{
if(UartQueueInit(&Uart0Queue))
{
PINSEL0 &= 0xFFFFFFF0;
PINSEL0 |= 0x00000005;
PCONP = PCONP|0x0008;
U0LCR = 0x80;
U0DLM = (FPCLK / 16) / baud / 256;
U0DLL = (FPCLK / 16) / baud % 256;
U0LCR = 0x03;
//U0FCR = 0x00;
U0IER = 0x03;
*(INT32U*)((INT32U)(&VICVectAddr0) + slot*4) = (U32)UART0_IRQ;
*(INT32U*)((INT32U)(&VICVectCntl0) + slot*4) = (0x20 | VIC_UART0);
VICIntEnable = (INT32U)(1 << VIC_UART0);
U0IER &= ~0x02;
}
}
else if(port == PORT_UART1)
{
if(UartQueueInit(&Uart1Queue))
{
PINSEL0 &= 0xFFF0FFFF;
PINSEL0 |= 0x00050000;
PCONP = PCONP|0x0010;
U1LCR = 0x80;
U1DLM = (FPCLK / 16) / baud / 256;
U1DLL = (FPCLK / 16) / baud % 256;
U1LCR = 0x03;
//U1FCR = 0x81;
U1IER = 0x03;
*(INT32U*)((INT32U)(&VICVectAddr0) + slot*4) = (U32)UART1_IRQ;
*(INT32U*)((INT32U)(&VICVectCntl0) + slot*4) = (0x20 | VIC_UART1);
VICIntEnable = (INT32U)(1 << VIC_UART1);
U1IER &= ~0x02;
}
}
}
void UartBaudChange(INT8U port,INT32U baud)
{
if(port == PORT_UART0)
{
U0LCR = 0x80;
U0DLM = (FPCLK / 16) / baud / 256;
U0DLL = (FPCLK / 16) / baud % 256;
U0LCR = 0x03;
}
else if(port == PORT_UART1)
{
U1LCR = 0x80;
U1DLM = (FPCLK / 16) / baud / 256;
U1DLL = (FPCLK / 16) / baud % 256;
U1LCR = 0x03;
}
}
INT16U UartRead(INT8U port,INT8U *buf,INT16U size,INT16U timeout)
{
INT16U n;
UartQueue_t *pqueue = 0;
switch(port)
{
case PORT_UART0:
pqueue = &Uart0Queue;
break;
case PORT_UART1:
pqueue = &Uart1Queue;
break;
}
//Task Rx Start
os_sem_wait(pqueue->rxPort,0xffff);
for(n=0;n<size;n++)
{
if(OS_R_TMO == os_sem_wait(pqueue->rxSem,timeout))
{
break;
}
*buf = *pqueue->rxPop;
buf++;
pqueue->rxPop++;
if(pqueue->rxPop == &pqueue->rxBuf[UART_RX_SIZE])
{
pqueue->rxPop = pqueue->rxBuf;
}
}
//Task Rx End
os_sem_send(pqueue->rxPort);
return n;
}
INT16U UartWrite(INT8U port,INT8U *buf,INT16U size,INT16U timeout)
{
INT16U n = 0;
UartQueue_t *pqueue = 0;
INT8U *thr = 0;
INT32U *ier = 0;
switch(port)
{
case PORT_UART0:
{
pqueue = &Uart0Queue;
thr = (INT8U*)&U0THR;
ier = (INT32U*)&U0IER;
}
break;
case PORT_UART1:
{
pqueue = &Uart1Queue;
thr = (INT8U*)&U1THR;
ier = (INT32U*)&U1IER;
}
break;
}
//Task Tx Start
os_sem_wait(pqueue->txPort,0xffff);
for(;n<size;n++)
{
if(OS_R_TMO == os_sem_wait(pqueue->txSem,timeout))
{
break;
}
*pqueue->txPush = *buf;
buf++;
pqueue->txPush++;
if(pqueue->txPush == &pqueue->txBuf[UART_TX_SIZE])
{
pqueue->txPush = pqueue->txBuf;
}
if((*ier & 0x02) == 0)
{
*thr = *pqueue->txPop;
*ier |= 0x02;
}
}
os_sem_send(pqueue->txPort);
return n;
}硬件平台:NXP LPC2103
软件平台:keil RL-ARM(keil为ARM专门做的操作系统)
功能:UART的底层驱动
#include "uart.h"
//static
UartQueue_t Uart0Queue;
UartQueue_t Uart1Queue;
/*************************************************************************************************
* Name : UartQueueInit
* Describe : 初始化串口缓存
* Input : 要初始化的缓存地址
* Output : 无
* Create by : 罗一鸣 Date: 2012年7月09日
* Moid by :
*************************************************************************************************/
static BOOL UartQueueInit(UartQueue_t* queue)
{
//init rx
if(NULL != queue->rxBuf)
{
os_free(queue->rxBuf);
queue->rxBuf = NULL;
}
queue->rxBuf = os_malloc(UART_RX_SIZE);
if(NULL == queue->rxBuf)
{
return FALSE;
}
os_sem_init (queue->rxSem, 0);
os_sem_init (queue->rxPort, 1);
queue->rxPush = queue->rxBuf;
queue->rxPop = queue->rxBuf;
//init tx
if(NULL != queue->txBuf)
{
os_free(queue->txBuf);
queue->txBuf = NULL;
}
queue->txBuf = os_malloc(UART_TX_SIZE);
if(NULL == queue->txBuf)
{
return FALSE;
}
os_sem_init (queue->txSem,UART_TX_SIZE);
os_sem_init (queue->txPort, 1);
queue->txPush = queue->txBuf;
queue->txPop = queue->txBuf;
return TRUE;
}
/*
UART0 ISR
*/
__inline void Uart0RxIsr(void)
{
INT8U c;
INT16U cnt;
cnt = OS_SEM_TOKENS(Uart0Queue.rxSem);
c = U0RBR;
if(cnt < UART_RX_SIZE)
{
cnt++;
isr_sem_send(Uart0Queue.rxSem);
*Uart0Queue.rxPush = c;
Uart0Queue.rxPush++;
if(Uart0Queue.rxPush == &Uart0Queue.rxBuf[UART_RX_SIZE])
{
Uart0Queue.rxPush = Uart0Queue.rxBuf;
}
}
}
__inline void Uart0TxIsr(void)
{
INT16U cnt;
cnt = OS_SEM_TOKENS(Uart0Queue.txSem);
isr_sem_send(Uart0Queue.txSem);
Uart0Queue.txPop++;
if(Uart0Queue.txPop == &Uart0Queue.txBuf[UART_TX_SIZE])
{
Uart0Queue.txPop = Uart0Queue.txBuf;
}
cnt++;
if(cnt < UART_TX_SIZE)
{
U0THR = *Uart0Queue.txPop;//break;
}
else
{
U0IER &= ~0x02;
}
}
void UART0_IRQ(void) __irq
{
INT32U INT_ID;
INT_ID = U0IIR & 0x0E;
switch(INT_ID)
{
case 0x04:
case 0x0C:
Uart0RxIsr();
break;
case 0x02:
Uart0TxIsr();
break;
default:
break;
}
VICVectAddr = 0; /* Acknowledge Interrupt */
}
/*
UART1 ISR
*/
__inline void Uart1RxIsr(void)
{
INT16U c,cnt;
cnt = OS_SEM_TOKENS(Uart1Queue.rxSem);
c = U1RBR;
if(cnt < UART_RX_SIZE)
{
isr_sem_send(Uart1Queue.rxSem);
cnt++;
*Uart1Queue.rxPush = c;
Uart1Queue.rxPush++;
if(Uart1Queue.rxPush == &Uart1Queue.rxBuf[UART_RX_SIZE])
{
Uart1Queue.rxPush = Uart1Queue.rxBuf;
}
}
}
__inline void Uart1TxIsr(void)
{
INT16U cnt;
cnt = OS_SEM_TOKENS(Uart1Queue.txSem);
isr_sem_send(Uart1Queue.txSem);
Uart1Queue.txPop++;
if(Uart1Queue.txPop == &Uart1Queue.txBuf[UART_TX_SIZE])
{
Uart1Queue.txPop = Uart1Queue.txBuf;
}
cnt++;
if(cnt < UART_TX_SIZE)
{
U1THR = *Uart1Queue.txPop;//break;
}
else
{
U1IER &= ~0x02;
}
}
void UART1_IRQ(void) __irq
{
INT32U INT_ID;
INT_ID = U1IIR & 0x0E;
if ((0x04 == INT_ID) || (0x0C == INT_ID))
{
/* Receive interrupt */
Uart1RxIsr();
}
else if (0x02 == INT_ID)
{
/* Transmit interrupt */
Uart1TxIsr();
}
VICVectAddr = 0; /* Acknowledge Interrupt */
}
/* UART INIT */
void UartIntConfig(INT8U port,INT8U slot,INT32U baud)
{
if(port == PORT_UART0)
{
if(UartQueueInit(&Uart0Queue))
{
PINSEL0 &= 0xFFFFFFF0;
PINSEL0 |= 0x00000005;
PCONP = PCONP|0x0008;
U0LCR = 0x80;
U0DLM = (FPCLK / 16) / baud / 256;
U0DLL = (FPCLK / 16) / baud % 256;
U0LCR = 0x03;
//U0FCR = 0x00;
U0IER = 0x03;
*(INT32U*)((INT32U)(&VICVectAddr0) + slot*4) = (U32)UART0_IRQ;
*(INT32U*)((INT32U)(&VICVectCntl0) + slot*4) = (0x20 | VIC_UART0);
VICIntEnable = (INT32U)(1 << VIC_UART0);
U0IER &= ~0x02;
}
}
else if(port == PORT_UART1)
{
if(UartQueueInit(&Uart1Queue))
{
PINSEL0 &= 0xFFF0FFFF;
PINSEL0 |= 0x00050000;
PCONP = PCONP|0x0010;
U1LCR = 0x80;
U1DLM = (FPCLK / 16) / baud / 256;
U1DLL = (FPCLK / 16) / baud % 256;
U1LCR = 0x03;
//U1FCR = 0x81;
U1IER = 0x03;
*(INT32U*)((INT32U)(&VICVectAddr0) + slot*4) = (U32)UART1_IRQ;
*(INT32U*)((INT32U)(&VICVectCntl0) + slot*4) = (0x20 | VIC_UART1);
VICIntEnable = (INT32U)(1 << VIC_UART1);
U1IER &= ~0x02;
}
}
}
void UartBaudChange(INT8U port,INT32U baud)
{
if(port == PORT_UART0)
{
U0LCR = 0x80;
U0DLM = (FPCLK / 16) / baud / 256;
U0DLL = (FPCLK / 16) / baud % 256;
U0LCR = 0x03;
}
else if(port == PORT_UART1)
{
U1LCR = 0x80;
U1DLM = (FPCLK / 16) / baud / 256;
U1DLL = (FPCLK / 16) / baud % 256;
U1LCR = 0x03;
}
}
INT16U UartRead(INT8U port,INT8U *buf,INT16U size,INT16U timeout)
{
INT16U n;
UartQueue_t *pqueue = 0;
switch(port)
{
case PORT_UART0:
pqueue = &Uart0Queue;
break;
case PORT_UART1:
pqueue = &Uart1Queue;
break;
}
//Task Rx Start
os_sem_wait(pqueue->rxPort,0xffff);
for(n=0;n<size;n++)
{
if(OS_R_TMO == os_sem_wait(pqueue->rxSem,timeout))
{
break;
}
*buf = *pqueue->rxPop;
buf++;
pqueue->rxPop++;
if(pqueue->rxPop == &pqueue->rxBuf[UART_RX_SIZE])
{
pqueue->rxPop = pqueue->rxBuf;
}
}
//Task Rx End
os_sem_send(pqueue->rxPort);
return n;
}
INT16U UartWrite(INT8U port,INT8U *buf,INT16U size,INT16U timeout)
{
INT16U n = 0;
UartQueue_t *pqueue = 0;
INT8U *thr = 0;
INT32U *ier = 0;
switch(port)
{
case PORT_UART0:
{
pqueue = &Uart0Queue;
thr = (INT8U*)&U0THR;
ier = (INT32U*)&U0IER;
}
break;
case PORT_UART1:
{
pqueue = &Uart1Queue;
thr = (INT8U*)&U1THR;
ier = (INT32U*)&U1IER;
}
break;
}
//Task Tx Start
os_sem_wait(pqueue->txPort,0xffff);
for(;n<size;n++)
{
if(OS_R_TMO == os_sem_wait(pqueue->txSem,timeout))
{
break;
}
*pqueue->txPush = *buf;
buf++;
pqueue->txPush++;
if(pqueue->txPush == &pqueue->txBuf[UART_TX_SIZE])
{
pqueue->txPush = pqueue->txBuf;
}
if((*ier & 0x02) == 0)
{
*thr = *pqueue->txPop;
*ier |= 0x02;
}
}
os_sem_send(pqueue->txPort);
return n;
}
软件平台:keil RL-ARM(keil为ARM专门做的操作系统)
功能:UART的底层驱动
#include "uart.h"
//static
UartQueue_t Uart0Queue;
UartQueue_t Uart1Queue;
/*************************************************************************************************
* Name : UartQueueInit
* Describe : 初始化串口缓存
* Input : 要初始化的缓存地址
* Output : 无
* Create by : 罗一鸣 Date: 2012年7月09日
* Moid by :
*************************************************************************************************/
static BOOL UartQueueInit(UartQueue_t* queue)
{
//init rx
if(NULL != queue->rxBuf)
{
os_free(queue->rxBuf);
queue->rxBuf = NULL;
}
queue->rxBuf = os_malloc(UART_RX_SIZE);
if(NULL == queue->rxBuf)
{
return FALSE;
}
os_sem_init (queue->rxSem, 0);
os_sem_init (queue->rxPort, 1);
queue->rxPush = queue->rxBuf;
queue->rxPop = queue->rxBuf;
//init tx
if(NULL != queue->txBuf)
{
os_free(queue->txBuf);
queue->txBuf = NULL;
}
queue->txBuf = os_malloc(UART_TX_SIZE);
if(NULL == queue->txBuf)
{
return FALSE;
}
os_sem_init (queue->txSem,UART_TX_SIZE);
os_sem_init (queue->txPort, 1);
queue->txPush = queue->txBuf;
queue->txPop = queue->txBuf;
return TRUE;
}
/*
UART0 ISR
*/
__inline void Uart0RxIsr(void)
{
INT8U c;
INT16U cnt;
cnt = OS_SEM_TOKENS(Uart0Queue.rxSem);
c = U0RBR;
if(cnt < UART_RX_SIZE)
{
cnt++;
isr_sem_send(Uart0Queue.rxSem);
*Uart0Queue.rxPush = c;
Uart0Queue.rxPush++;
if(Uart0Queue.rxPush == &Uart0Queue.rxBuf[UART_RX_SIZE])
{
Uart0Queue.rxPush = Uart0Queue.rxBuf;
}
}
}
__inline void Uart0TxIsr(void)
{
INT16U cnt;
cnt = OS_SEM_TOKENS(Uart0Queue.txSem);
isr_sem_send(Uart0Queue.txSem);
Uart0Queue.txPop++;
if(Uart0Queue.txPop == &Uart0Queue.txBuf[UART_TX_SIZE])
{
Uart0Queue.txPop = Uart0Queue.txBuf;
}
cnt++;
if(cnt < UART_TX_SIZE)
{
U0THR = *Uart0Queue.txPop;//break;
}
else
{
U0IER &= ~0x02;
}
}
void UART0_IRQ(void) __irq
{
INT32U INT_ID;
INT_ID = U0IIR & 0x0E;
switch(INT_ID)
{
case 0x04:
case 0x0C:
Uart0RxIsr();
break;
case 0x02:
Uart0TxIsr();
break;
default:
break;
}
VICVectAddr = 0; /* Acknowledge Interrupt */
}
/*
UART1 ISR
*/
__inline void Uart1RxIsr(void)
{
INT16U c,cnt;
cnt = OS_SEM_TOKENS(Uart1Queue.rxSem);
c = U1RBR;
if(cnt < UART_RX_SIZE)
{
isr_sem_send(Uart1Queue.rxSem);
cnt++;
*Uart1Queue.rxPush = c;
Uart1Queue.rxPush++;
if(Uart1Queue.rxPush == &Uart1Queue.rxBuf[UART_RX_SIZE])
{
Uart1Queue.rxPush = Uart1Queue.rxBuf;
}
}
}
__inline void Uart1TxIsr(void)
{
INT16U cnt;
cnt = OS_SEM_TOKENS(Uart1Queue.txSem);
isr_sem_send(Uart1Queue.txSem);
Uart1Queue.txPop++;
if(Uart1Queue.txPop == &Uart1Queue.txBuf[UART_TX_SIZE])
{
Uart1Queue.txPop = Uart1Queue.txBuf;
}
cnt++;
if(cnt < UART_TX_SIZE)
{
U1THR = *Uart1Queue.txPop;//break;
}
else
{
U1IER &= ~0x02;
}
}
void UART1_IRQ(void) __irq
{
INT32U INT_ID;
INT_ID = U1IIR & 0x0E;
if ((0x04 == INT_ID) || (0x0C == INT_ID))
{
/* Receive interrupt */
Uart1RxIsr();
}
else if (0x02 == INT_ID)
{
/* Transmit interrupt */
Uart1TxIsr();
}
VICVectAddr = 0; /* Acknowledge Interrupt */
}
/* UART INIT */
void UartIntConfig(INT8U port,INT8U slot,INT32U baud)
{
if(port == PORT_UART0)
{
if(UartQueueInit(&Uart0Queue))
{
PINSEL0 &= 0xFFFFFFF0;
PINSEL0 |= 0x00000005;
PCONP = PCONP|0x0008;
U0LCR = 0x80;
U0DLM = (FPCLK / 16) / baud / 256;
U0DLL = (FPCLK / 16) / baud % 256;
U0LCR = 0x03;
//U0FCR = 0x00;
U0IER = 0x03;
*(INT32U*)((INT32U)(&VICVectAddr0) + slot*4) = (U32)UART0_IRQ;
*(INT32U*)((INT32U)(&VICVectCntl0) + slot*4) = (0x20 | VIC_UART0);
VICIntEnable = (INT32U)(1 << VIC_UART0);
U0IER &= ~0x02;
}
}
else if(port == PORT_UART1)
{
if(UartQueueInit(&Uart1Queue))
{
PINSEL0 &= 0xFFF0FFFF;
PINSEL0 |= 0x00050000;
PCONP = PCONP|0x0010;
U1LCR = 0x80;
U1DLM = (FPCLK / 16) / baud / 256;
U1DLL = (FPCLK / 16) / baud % 256;
U1LCR = 0x03;
//U1FCR = 0x81;
U1IER = 0x03;
*(INT32U*)((INT32U)(&VICVectAddr0) + slot*4) = (U32)UART1_IRQ;
*(INT32U*)((INT32U)(&VICVectCntl0) + slot*4) = (0x20 | VIC_UART1);
VICIntEnable = (INT32U)(1 << VIC_UART1);
U1IER &= ~0x02;
}
}
}
void UartBaudChange(INT8U port,INT32U baud)
{
if(port == PORT_UART0)
{
U0LCR = 0x80;
U0DLM = (FPCLK / 16) / baud / 256;
U0DLL = (FPCLK / 16) / baud % 256;
U0LCR = 0x03;
}
else if(port == PORT_UART1)
{
U1LCR = 0x80;
U1DLM = (FPCLK / 16) / baud / 256;
U1DLL = (FPCLK / 16) / baud % 256;
U1LCR = 0x03;
}
}
INT16U UartRead(INT8U port,INT8U *buf,INT16U size,INT16U timeout)
{
INT16U n;
UartQueue_t *pqueue = 0;
switch(port)
{
case PORT_UART0:
pqueue = &Uart0Queue;
break;
case PORT_UART1:
pqueue = &Uart1Queue;
break;
}
//Task Rx Start
os_sem_wait(pqueue->rxPort,0xffff);
for(n=0;n<size;n++)
{
if(OS_R_TMO == os_sem_wait(pqueue->rxSem,timeout))
{
break;
}
*buf = *pqueue->rxPop;
buf++;
pqueue->rxPop++;
if(pqueue->rxPop == &pqueue->rxBuf[UART_RX_SIZE])
{
pqueue->rxPop = pqueue->rxBuf;
}
}
//Task Rx End
os_sem_send(pqueue->rxPort);
return n;
}
INT16U UartWrite(INT8U port,INT8U *buf,INT16U size,INT16U timeout)
{
INT16U n = 0;
UartQueue_t *pqueue = 0;
INT8U *thr = 0;
INT32U *ier = 0;
switch(port)
{
case PORT_UART0:
{
pqueue = &Uart0Queue;
thr = (INT8U*)&U0THR;
ier = (INT32U*)&U0IER;
}
break;
case PORT_UART1:
{
pqueue = &Uart1Queue;
thr = (INT8U*)&U1THR;
ier = (INT32U*)&U1IER;
}
break;
}
//Task Tx Start
os_sem_wait(pqueue->txPort,0xffff);
for(;n<size;n++)
{
if(OS_R_TMO == os_sem_wait(pqueue->txSem,timeout))
{
break;
}
*pqueue->txPush = *buf;
buf++;
pqueue->txPush++;
if(pqueue->txPush == &pqueue->txBuf[UART_TX_SIZE])
{
pqueue->txPush = pqueue->txBuf;
}
if((*ier & 0x02) == 0)
{
*thr = *pqueue->txPop;
*ier |= 0x02;
}
}
os_sem_send(pqueue->txPort);
return n;
}硬件平台:NXP LPC2103
软件平台:keil RL-ARM(keil为ARM专门做的操作系统)
功能:UART的底层驱动
#include "uart.h"
//static
UartQueue_t Uart0Queue;
UartQueue_t Uart1Queue;
/*************************************************************************************************
* Name : UartQueueInit
* Describe : 初始化串口缓存
* Input : 要初始化的缓存地址
* Output : 无
* Create by : 罗一鸣 Date: 2012年7月09日
* Moid by :
*************************************************************************************************/
static BOOL UartQueueInit(UartQueue_t* queue)
{
//init rx
if(NULL != queue->rxBuf)
{
os_free(queue->rxBuf);
queue->rxBuf = NULL;
}
queue->rxBuf = os_malloc(UART_RX_SIZE);
if(NULL == queue->rxBuf)
{
return FALSE;
}
os_sem_init (queue->rxSem, 0);
os_sem_init (queue->rxPort, 1);
queue->rxPush = queue->rxBuf;
queue->rxPop = queue->rxBuf;
//init tx
if(NULL != queue->txBuf)
{
os_free(queue->txBuf);
queue->txBuf = NULL;
}
queue->txBuf = os_malloc(UART_TX_SIZE);
if(NULL == queue->txBuf)
{
return FALSE;
}
os_sem_init (queue->txSem,UART_TX_SIZE);
os_sem_init (queue->txPort, 1);
queue->txPush = queue->txBuf;
queue->txPop = queue->txBuf;
return TRUE;
}
/*
UART0 ISR
*/
__inline void Uart0RxIsr(void)
{
INT8U c;
INT16U cnt;
cnt = OS_SEM_TOKENS(Uart0Queue.rxSem);
c = U0RBR;
if(cnt < UART_RX_SIZE)
{
cnt++;
isr_sem_send(Uart0Queue.rxSem);
*Uart0Queue.rxPush = c;
Uart0Queue.rxPush++;
if(Uart0Queue.rxPush == &Uart0Queue.rxBuf[UART_RX_SIZE])
{
Uart0Queue.rxPush = Uart0Queue.rxBuf;
}
}
}
__inline void Uart0TxIsr(void)
{
INT16U cnt;
cnt = OS_SEM_TOKENS(Uart0Queue.txSem);
isr_sem_send(Uart0Queue.txSem);
Uart0Queue.txPop++;
if(Uart0Queue.txPop == &Uart0Queue.txBuf[UART_TX_SIZE])
{
Uart0Queue.txPop = Uart0Queue.txBuf;
}
cnt++;
if(cnt < UART_TX_SIZE)
{
U0THR = *Uart0Queue.txPop;//break;
}
else
{
U0IER &= ~0x02;
}
}
void UART0_IRQ(void) __irq
{
INT32U INT_ID;
INT_ID = U0IIR & 0x0E;
switch(INT_ID)
{
case 0x04:
case 0x0C:
Uart0RxIsr();
break;
case 0x02:
Uart0TxIsr();
break;
default:
break;
}
VICVectAddr = 0; /* Acknowledge Interrupt */
}
/*
UART1 ISR
*/
__inline void Uart1RxIsr(void)
{
INT16U c,cnt;
cnt = OS_SEM_TOKENS(Uart1Queue.rxSem);
c = U1RBR;
if(cnt < UART_RX_SIZE)
{
isr_sem_send(Uart1Queue.rxSem);
cnt++;
*Uart1Queue.rxPush = c;
Uart1Queue.rxPush++;
if(Uart1Queue.rxPush == &Uart1Queue.rxBuf[UART_RX_SIZE])
{
Uart1Queue.rxPush = Uart1Queue.rxBuf;
}
}
}
__inline void Uart1TxIsr(void)
{
INT16U cnt;
cnt = OS_SEM_TOKENS(Uart1Queue.txSem);
isr_sem_send(Uart1Queue.txSem);
Uart1Queue.txPop++;
if(Uart1Queue.txPop == &Uart1Queue.txBuf[UART_TX_SIZE])
{
Uart1Queue.txPop = Uart1Queue.txBuf;
}
cnt++;
if(cnt < UART_TX_SIZE)
{
U1THR = *Uart1Queue.txPop;//break;
}
else
{
U1IER &= ~0x02;
}
}
void UART1_IRQ(void) __irq
{
INT32U INT_ID;
INT_ID = U1IIR & 0x0E;
if ((0x04 == INT_ID) || (0x0C == INT_ID))
{
/* Receive interrupt */
Uart1RxIsr();
}
else if (0x02 == INT_ID)
{
/* Transmit interrupt */
Uart1TxIsr();
}
VICVectAddr = 0; /* Acknowledge Interrupt */
}
/* UART INIT */
void UartIntConfig(INT8U port,INT8U slot,INT32U baud)
{
if(port == PORT_UART0)
{
if(UartQueueInit(&Uart0Queue))
{
PINSEL0 &= 0xFFFFFFF0;
PINSEL0 |= 0x00000005;
PCONP = PCONP|0x0008;
U0LCR = 0x80;
U0DLM = (FPCLK / 16) / baud / 256;
U0DLL = (FPCLK / 16) / baud % 256;
U0LCR = 0x03;
//U0FCR = 0x00;
U0IER = 0x03;
*(INT32U*)((INT32U)(&VICVectAddr0) + slot*4) = (U32)UART0_IRQ;
*(INT32U*)((INT32U)(&VICVectCntl0) + slot*4) = (0x20 | VIC_UART0);
VICIntEnable = (INT32U)(1 << VIC_UART0);
U0IER &= ~0x02;
}
}
else if(port == PORT_UART1)
{
if(UartQueueInit(&Uart1Queue))
{
PINSEL0 &= 0xFFF0FFFF;
PINSEL0 |= 0x00050000;
PCONP = PCONP|0x0010;
U1LCR = 0x80;
U1DLM = (FPCLK / 16) / baud / 256;
U1DLL = (FPCLK / 16) / baud % 256;
U1LCR = 0x03;
//U1FCR = 0x81;
U1IER = 0x03;
*(INT32U*)((INT32U)(&VICVectAddr0) + slot*4) = (U32)UART1_IRQ;
*(INT32U*)((INT32U)(&VICVectCntl0) + slot*4) = (0x20 | VIC_UART1);
VICIntEnable = (INT32U)(1 << VIC_UART1);
U1IER &= ~0x02;
}
}
}
void UartBaudChange(INT8U port,INT32U baud)
{
if(port == PORT_UART0)
{
U0LCR = 0x80;
U0DLM = (FPCLK / 16) / baud / 256;
U0DLL = (FPCLK / 16) / baud % 256;
U0LCR = 0x03;
}
else if(port == PORT_UART1)
{
U1LCR = 0x80;
U1DLM = (FPCLK / 16) / baud / 256;
U1DLL = (FPCLK / 16) / baud % 256;
U1LCR = 0x03;
}
}
INT16U UartRead(INT8U port,INT8U *buf,INT16U size,INT16U timeout)
{
INT16U n;
UartQueue_t *pqueue = 0;
switch(port)
{
case PORT_UART0:
pqueue = &Uart0Queue;
break;
case PORT_UART1:
pqueue = &Uart1Queue;
break;
}
//Task Rx Start
os_sem_wait(pqueue->rxPort,0xffff);
for(n=0;n<size;n++)
{
if(OS_R_TMO == os_sem_wait(pqueue->rxSem,timeout))
{
break;
}
*buf = *pqueue->rxPop;
buf++;
pqueue->rxPop++;
if(pqueue->rxPop == &pqueue->rxBuf[UART_RX_SIZE])
{
pqueue->rxPop = pqueue->rxBuf;
}
}
//Task Rx End
os_sem_send(pqueue->rxPort);
return n;
}
INT16U UartWrite(INT8U port,INT8U *buf,INT16U size,INT16U timeout)
{
INT16U n = 0;
UartQueue_t *pqueue = 0;
INT8U *thr = 0;
INT32U *ier = 0;
switch(port)
{
case PORT_UART0:
{
pqueue = &Uart0Queue;
thr = (INT8U*)&U0THR;
ier = (INT32U*)&U0IER;
}
break;
case PORT_UART1:
{
pqueue = &Uart1Queue;
thr = (INT8U*)&U1THR;
ier = (INT32U*)&U1IER;
}
break;
}
//Task Tx Start
os_sem_wait(pqueue->txPort,0xffff);
for(;n<size;n++)
{
if(OS_R_TMO == os_sem_wait(pqueue->txSem,timeout))
{
break;
}
*pqueue->txPush = *buf;
buf++;
pqueue->txPush++;
if(pqueue->txPush == &pqueue->txBuf[UART_TX_SIZE])
{
pqueue->txPush = pqueue->txBuf;
}
if((*ier & 0x02) == 0)
{
*thr = *pqueue->txPop;
*ier |= 0x02;
}
}
os_sem_send(pqueue->txPort);
return n;
}
已经很明显了
都看不懂
已经很明显了
嗯!太明显了!
嗯!太明显了!
嗯!太明显了!
嗯!非常明显!
嗯!非常明显!
…罗一鸣…,要么同名同姓,要么我认识…
我进错门了~
是给按摩棒编的程序吗?
如没看错,程序有瑕疵,资源有泄漏的可能,不知对否?
queue->txBuf = os_malloc(UART_TX_SIZE);
if(NULL == queue->txBuf)
{
return FALSE;
}
前面的rxBuf不释放吗?
queue->txBuf = os_malloc(UART_TX_SIZE);
if(NULL == queue->txBuf)
{
return FALSE;
}
前面的rxBuf不释放吗?
这什么- -鬼画符召僵尸的?
这段代码让我想起那个外包的段子!楼主加油啊
军事论坛发这货?召唤斑竹。。。
看不懂。等人翻译成汉语
楼主。。。俺们啥也看不懂啊
在这儿贴代码 有病
楼主开玩笑吧,随便一本单片机教科书都有的东西
55560593mxzy 发表于 2012-7-30 23:43
在这儿贴代码 有病
同感
在这儿贴代码 有病
同感
小学文化 曾经买了本C++看了几页就扔了
“return n”这里不是应该返回0的么?返回n是一样的么?
“return n”这里不是应该返回0的么?返回n是一样的么?
在这儿贴代码 有病
别用这么重的语气 我们可能看不懂 相信楼主一定有理由的
别用这么重的语气 我们可能看不懂 相信楼主一定有理由的